PDP-11


The PDP-11 is a series of 16-bit minicomputers originally sold by Digital Equipment Corporation from 1970 into the late 1990s, one of a set of products in the Programmed Data Processor series. In total, around 600,000 PDP-11s of all models were sold, making it one of DEC's most successful product lines. The PDP-11 is considered by some experts to be the most popular minicomputer.
The PDP-11 included a number of innovative features in its instruction set and additional general-purpose registers that made it easier to program than earlier models in the PDP series. Further, the innovative Unibus system allowed external devices to be more easily interfaced to the system using direct memory access, opening the system to a wide variety of peripherals. The PDP-11 replaced the PDP-8 in many real-time computing applications, although both product lines lived in parallel for more than 10 years. The ease of programming of the PDP-11 made it popular for general-purpose computing.
The design of the PDP-11 inspired the design of late-1970s microprocessors including the Intel x86 and the Motorola 68000. The design features of PDP-11 operating systems, and other operating systems from Digital Equipment, influenced the design of operating systems such as CP/M and hence also MS-DOS. The first officially named version of Unix ran on the PDP-11/20 in 1970. It is commonly stated that the C programming language took advantage of several low-level PDP-11–dependent programming features, albeit not originally by design.
An effort to expand the PDP-11 from 16- to 32-bit addressing led to the VAX-11 design, which took part of its name from the PDP-11.

History

Previous machines

In 1963, DEC introduced what is considered to be the first commercial minicomputer in the form of the PDP-5. This was a 12-bit design adapted from the 1962 LINC machine that was intended to be used in a lab setting. DEC slightly simplified the LINC system and instruction set, aiming the PDP-5 at smaller settings that did not need the power of their larger 18-bit PDP-4. The PDP-5 was a success, ultimately selling about 1,000 machines. This led to the PDP-8, a further cost-reduced 12-bit model that sold about 50,000 units.
During this period, the computer market was moving from computer word lengths based on units of 6 bits to units of 8 bits, following the introduction of the 7-bit ASCII standard. In 1967–1968, DEC engineers designed a 16-bit machine, the PDP-X, but management ultimately canceled the project as it did not appear to offer a significant advantage over their existing 12- and 18-bit platforms.
This prompted several of the engineers from the PDP-X program to leave DEC and form Data General. The next year they introduced the 16-bit Data General Nova. The Nova sold tens of thousands of units and launched what would become one of DEC's major competitors through the 1970s and 1980s.

Release

, president and founder of DEC, was more interested in a small 8-bit machine than the larger 16-bit system. This became the "Desk Calculator" project. Not long after, Datamation published a note about a desk calculator being developed at DEC, which caused concern at Wang Laboratories, who were heavily invested in that market. Before long, it became clear that the entire market was moving to 16-bit, and the Desk Calculator began a 16-bit design as well.
The team decided that the best approach to a new architecture would be to minimize the memory bandwidth needed to execute the instructions. Larry McGowan coded a series of assembly language programs using the instruction sets of various existing platforms and examined how much memory would be exchanged to execute them. Harold McFarland joined the effort and had already written a very complex instruction set that the team rejected, but a second one was simpler and would ultimately form the basis for the PDP-11.
When they first presented the new architecture, the managers were dismayed. It lacked single instruction-word immediate data and short addresses, both of which were considered essential to improving memory performance. McGowan and McFarland were eventually able to convince them that the system would work as expected, and suddenly "the Desk Calculator project got hot". Much of the system was developed using a PDP-10 where the SIM-11 simulated what would become the PDP-11/20 and Bob Bowers wrote an assembler for it.
At a late stage, the marketing team wanted to ship the system with 2K of memory as the minimal configuration. When McGowan stated this would mean an assembler could not run on the system, the minimum was expanded to 4K. The marketing team also wanted to use the slash character for comments in the assembler code, as was the case in the PDP-8 assembler. McGowan stated that he would then have to use semicolon to indicate division, and the idea was dropped.
The PDP-11 family was announced in January 1970 and shipments began early that year. DEC sold over 170,000 PDP-11s in the 1970s. The architecture provided the majority of DEC's sales, sales growth, and profit from the early 1970s to early 1980s.
Initially manufactured of small-scale transistor–transistor logic, a single-board large-scale integration version of the processor was developed in 1975. A two- or three-chip processor, the J-11 was developed in 1979.
The last models of the PDP-11 line were the single board PDP-11/94 and PDP-11/93 introduced in 1990.

Innovative features

Instruction set orthogonality

The PDP-11 processor architecture has a mostly orthogonal instruction set. For example, instead of instructions such as load and store, the PDP-11 has a move instruction for which either operand can be memory or register. There are no specific input or output instructions; the PDP-11 uses memory-mapped I/O and so the same move instruction is used; orthogonality even enables moving data directly from an input device to an output device. More complex instructions such as add likewise can have memory, register, input, or output as source or destination.
Most operands can apply any of eight addressing modes to eight registers. The addressing modes provide register, immediate, absolute, relative, deferred, and indexed addressing, and can specify autoincrementation and autodecrementation of a register by one or two. Use of relative addressing lets a machine-language program be position-independent.

No dedicated I/O instructions

Early models of the PDP-11 had no dedicated bus for input/output, but only a system bus called the Unibus, as input and output devices were mapped to memory addresses.
An input/output device determined the memory addresses to which it would respond, and specified its own interrupt vector and interrupt priority. This flexible framework provided by the processor architecture made it unusually easy to invent new bus devices, including devices to control hardware that had not been contemplated when the processor was originally designed. DEC openly published the basic Unibus specifications, even offering prototyping bus interface circuit boards, and encouraging customers to develop their own Unibus-compatible hardware.
The Unibus made the PDP-11 suitable for custom peripherals. One of the predecessors of Alcatel-Lucent, the Bell Telephone Manufacturing Company, developed the BTMC DPS-1500 packet-switching network and used PDP-11s in the regional and national network management system, with the Unibus directly connected to the DPS-1500 hardware.
Higher-performance members of the PDP-11 family departed from the single-bus approach. The PDP-11/45 had a dedicated data path within the CPU, connecting semiconductor memory to the processor, with core memory and I/O devices connected via the Unibus. In the PDP-11/70, this was taken a step further, with the addition of a dedicated interface between disks and tapes and memory, via the Massbus. Although input/output devices continued to be mapped into memory addresses, some additional programming was necessary to set up the added bus interfaces.

Interrupts

The PDP-11 supports hardware interrupts at four priority levels. Interrupts are serviced by software service routines, which could specify whether they themselves could be interrupted. The event that causes the interrupt is indicated by the device itself, as it informs the processor of the address of its own interrupt vector.
Interrupt vectors are blocks of two 16-bit words in low kernel address space between 0 and 776. The first word of the interrupt vector contains the address of the interrupt service routine and the second word the value to be loaded into the PSW on entry to the service routine.

Designed for mass production

The PDP-11 was designed for ease of manufacture by semiskilled labor. The dimensions of its pieces were relatively non-critical. It used a wire-wrapped backplane.

LSI-11 integrated circuits

The LSI-11, introduced in February 1975 is the first PDP-11 model produced using large-scale integration MOSFET integrated circuits; the entire CPU is contained on four LSI chips made by Western Digital. It uses a bus which is a close variant of the Unibus called the LSI Bus or Q-Bus; it differs from the Unibus primarily in that addresses and data are multiplexed onto a shared set of wires rather than having separate sets of wires. It also differs slightly in how it addresses I/O devices and it eventually allowed a 22-bit physical address and block-mode operations for significantly improved bandwidth.
The CPU microcode includes a debugger: firmware with a direct serial interface to a terminal. This lets the operator do debugging by typing commands and reading octal numbers, rather than operating switches and reading lights, the typical debugging method at the time. The operator can thus examine and modify the computer's registers, memory, and input/output devices, diagnosing and perhaps correcting failures in software and peripherals. The operator can also specify which disk to boot from. Both innovations increased the reliability and decreased the cost of the LSI-11.
A Writable Control Store option could be added to the LSI-11. This option allowed programming of the internal 8-bit micromachine to create application-specific extensions to the PDP-11 instruction set. The WCS is a quad Q-Bus board with a ribbon cable connecting to the third microcode ROM socket. The source code for EIS/FIS microcode was included so these instructions, normally located in the third MICROM, could be loaded in the WCS, if desired.
Later Q-Bus based systems such as the LSI-11/23, /73, and /83 are based upon chip sets designed in house by Digital Equipment Corporation. Later PDP-11 Unibus systems were designed to use similar Q-Bus processor cards, using a Unibus adapter to support existing Unibus peripherals, sometimes with a special memory bus for improved speed.
There were other significant innovations in the Q-Bus lineup. For example, a system variant of the PDP-11/03 introduced full system power-on self-test.