List of Super NES enhancement chips
The list of Super NES enhancement chips demonstrates the overall design plan for the Super Nintendo Entertainment System, whereby the console's hardware designers had made it easy to interface special coprocessor chips to the console. This standardized selection of chips was available to increase system performance and features for each game cartridge. As increasingly superior chips became available throughout the SNES's retail market years, this strategy originally provided a cheaper and more versatile way of maintaining the system's market lifespan when compared to Nintendo's option of having included a much more expensive CPU or a more obsolete stock chipset.
As a result, various enhancement chips were integrated into the cartridges of select game titles. The presence of an enhancement chip is most often indicated by 16 additional pins on either side of the original pins, 8 to each side.
Super FX
The Super FX chip is a 16-bit supplemental RISC CPU developed by Argonaut Games that was included in certain game cartridges to perform functions that the main CPU can not feasibly do. It is typically programmed to act as a graphics accelerator chip that draws polygons to a frame buffer in the RAM sitting adjacent to it.In addition to rendering polygons, the chip can assist the SNES with advanced 2D effects. uses the Super FX 2 for sprite scaling, rotation, and stretching.
This chip went through at least four revisions, first starting out as a surface mounted chip labeled "MARIO CHIP 1" in the earliest Star Fox cartridges, commonly called the Super FX. The following year, some boards were providing an epoxy version of it, and later a first revision came out under the label "GSU-1". Both versions are clocked with a signal, but an internal clock speed divider halves it to on the MARIO CHIP 1. The GSU-1 however runs at the full 21 MHz. Both the MARIO CHIP 1 and the GSU-1 can support a maximum ROM size of. Later on, the design was revised to become the GSU-2, which is still 16-bit, but unlike the earlier Super FX chips, this version can support a ROM size greater than 8 MBit. The final known revision is the GSU-2-SP1. All versions of the Super FX chip are functionally compatible in terms of their instruction set. The differences arise in how they are packaged, their pinout, their maximum supported ROM size, and their internal clock speed.
Cx4
The Cx4 chip is a math coprocessor that was used by Capcom and produced by Hitachi to perform general trigonometric calculations for wireframe effects, sprite positioning and rotation. It is known for its role in mapping and transforming wireframes in Capcom's second and third Mega Man X series games. It is based on the Hitachi HG51B169 DSP and clocked at 20Mhz. The name Cx4 stands for Capcom Consumer Custom Chip.A Cx4 self-test screen can be accessed by holding the 'B' button on the second controller upon system start-up in both Mega Man X2 and Mega Man X3. In both the PlayStation 2 and Nintendo GameCube versions of Mega Man X Collection, this self-test screen is still accessible in Mega Man X2, but not in Mega Man X3, because Mega Man X Collection features the 32-bit CD version of the game and not the SNES version.
DSP
This series of fixed-point digital signal processor chips allowed for fast vector-based calculations, bitmap conversions, both 2D and 3D coordinate transformations, and other functions. Four revisions of the chip exist, each physically identical but with different microcode. The DSP-1 version, including the later 1A die shrink and 1B bug fix revisions, was most often used; the DSP-2, DSP-3, and DSP-4 were used in only one title each. All of them are based on the NEC µPD77C25 CPU and clocked at 8Mhz.DSP-1
The DSP-1 is the most varied and widely used of the SNES DSPs, appearing in over 15 separate titles. It is used as a math coprocessor in games such as Super Mario Kart and Pilotwings that require more advanced Mode 7 scaling and rotation. It also provides fast support for the floating point and trigonometric calculations needed by 3D math algorithms. The later DSP-1A and DSP-1B serve the same purpose as the DSP-1. The DSP-1A is a die shrink of the DSP-1, and the DSP-1B also corrects several bugs. The DSP-1B introduced a bug in the Pilotwings demo due to the game code not being updated to reflect the timing differences of the chip revisions.DSP-2
The DSP-2 can only be found in the SNES port of Dungeon Master. Its primary purpose is to convert Atari ST bitmap image data into the SNES bitplane format. It also provides dynamic scaling capability and transparency effects.DSP-3
DSP-3 is an assistant chip, used in only one game for the Japanese Super Famicom, a turn-based strategy game titled SD Gundam GX. The chip assists with tasks like calculating the next AI move, Shannon–Fano bitstream decompression, and bitplane conversion of graphics.DSP-4
DSP-4 is used in only one game cartridge, Top Gear 3000. It primarily assists with drawing the race track, especially during the times that the track branches into multiple paths.Sharp LR35902
The hardware inside the Super Game Boy peripheral includes a Sharp SM83 core identical to the CPU in the handheld Game Boy. Because the Super NES is not powerful enough for software emulation of the Game Boy, the hardware for the entire handheld is inside of the cartridge.MX15001TFC
This chip was made by MegaChips exclusively for Nintendo Power cartridges for the Super Famicom. The cartridges are equipped with flash ROMs instead of mask ROMs, and were designed to hold games downloaded for a fee from specialized kiosks in Japan. The chip manages communication with the kiosks to download ROM images, and provides an initial menu to select which of the downloaded games would be played. Some titles were produced both in cartridge and download form, while others were download only. The service was closed on February 8, 2007.OBC-1
OBC-1 is a sprite manipulation chip used exclusively in the Super Scope game , the sequel to Battle Clash.Rockwell RC2324DPL
The Rockwell RC96V24DP is a low power, V.22 bis 2400 bit/s data/fax modem data pump in a single VLSI package, used in the XBAND cartridge.S-DD1
The S-DD1 chip is an ASIC decompressor made by Nintendo for use in some Super Nintendo Entertainment System Game Paks. Designed to handle data compressed by ABS Lossless Entropy Algorithm, a form of arithmetic coding developed by Ricoh, its use is necessary in games where massive amounts of sprite data are compressed with a total design limit of 32-megabits. This data is decompressed dynamically by the S-DD1 and given directly to the picture processing unit.The S-DD1 mediates between the Super NES's Ricoh 5A22 CPU and the game's ROM via two buses. However, the controlling 5A22 processor may still request normal, uncompressed data from the game's ROM even if the S-DD1 is already busy with a decompression operation. This form of parallelism allows sprite data to be decompressed while other types of data are quickly passed to the main CPU.
Star Ocean and Street Fighter Alpha 2 are the only games that use this chip. Emulation of the S-DD1 initially proved to be difficult, requiring "graphics packs" to be provided for the affected titles, until the compression algorithm was identified.
S-RTC
S-RTC is a real-time clock chip used in one game, Daikaijuu Monogatari II.SA1
The Super Accelerator 1 chip is used in 34 SNES games, including the popular .Similar to the 5A22 CPU in the SNES console, the SA1 contains a processor core based on the 65C816 with several programmable timers. The SA1 does not function as a slave CPU for the 5A22; both can interrupt each other independently.
The SA1 also features a range of enhancements over the standard 65C816:
- 10.74 MHz clock speed, compared to the 5A22's maximum of 3.58 MHz
- Faster RAM, including 2KBytes of internal RAM
- Memory mapping capabilities
- Limited data storage and compression
- New DMA modes such as bitmap to bit plane transfer
- Arithmetic functions
- Hardware timer
- Built-in CIC lockout, for copy protection and regional marketing control