Low-voltage differential signaling

Low-voltage differential signaling, also known as TIA/EIA-644, is a technical standard that specifies electrical characteristics of a differential, serial signaling standard. LVDS operates at low power and can run at very high speeds using inexpensive twisted-pair copper cables. LVDS is a physical layer specification only; many data communication standards and applications use it and add a data link layer as defined in the OSI model on top of it.
LVDS was introduced in 1994, and has become popular in products such as LCD-TVs, in-car entertainment systems, industrial cameras and machine vision, notebook and tablet computers, and communications systems. The typical applications are high-speed video, graphics, video camera data transfers, and general purpose computer buses.
Early on, the notebook computer and LCD display vendors commonly used the term LVDS instead of FPD-Link when referring to their protocol, and the term LVDS has mistakenly become synonymous with Flat Panel Display Link in the video-display engineering vocabulary.

Differential vs. single-ended signaling

LVDS is a differential signaling system, meaning that it transmits information as the difference between the voltages on a pair of wires; the two wire voltages are compared at the receiver. In a typical implementation, the transmitter injects a constant current of 3.5 mA into the wires, with the direction of current determining the digital logic level. The current passes through a termination resistor of about 100 to 120 ohms at the receiving end, and then returns in the opposite direction via the other wire. From Ohm's law, the voltage difference across the resistor is therefore about 350 mV. The receiver senses the polarity of this voltage to determine the logic level.
As long as there is tight electric- and magnetic-field coupling between the two wires, LVDS reduces the generation of electromagnetic noise. This noise reduction is due to the equal and opposite current flow in the two wires creating equal and opposite electromagnetic fields that tend to cancel each other. In addition, the tightly coupled transmission wires will reduce susceptibility to electromagnetic noise interference because the noise will equally affect each wire and appear as a common-mode noise. The LVDS receiver is unaffected by common-mode noise because it senses the differential voltage, where the common-mode noise impacts both pairs equally, resulting in no relative voltage difference between them.
The fact that the LVDS transmitter consumes a constant current also places much less demand on the power supply decoupling and thus produces less interference in the power and ground lines of the transmitting circuit. This reduces or eliminates phenomena such as ground bounce which are typically seen in terminated single-ended transmission lines where high and low logic levels consume different currents, or in non-terminated transmission lines where a current appears abruptly during switching.
The low common-mode voltage of about 1.2 V allows using LVDS with a wide range of integrated circuits with power supply voltages down to 2.5 V or lower. In addition, there are variations of LVDS that use a lower common mode voltage. One example is sub-LVDS that uses 0.9 V typical common mode voltage. Another is Scalable Low Voltage Signaling for 400 mV specified in JEDEC JESD8-13 October 2001 where the power supply can be as low as 800 mV and common mode voltage is about 400 mV.
The low differential voltage, about 350 mV, causes LVDS to consume very little power compared to other signaling technologies. This is achieved, in part, by the transmitter's design, which consists of a constant current source and four MOSFET switches forming an H-bridge . At 2.5 V supply voltage the power to drive 3.5 mA becomes 8.75 mW, compared to the 90 mW dissipated by the load resistor for an RS-422 signal.
Logic levels:

V_ee	V_OL	V_OH	V_cc	V_CMO
GND	1.0 V	1.4 V	2.5–3.3 V	1.2 V

LVDS is not the only low-power differential signaling system in use, others include the Fairchild Current Transfer Logic serial I/O.

Applications

In 1994, National Semiconductor introduced LVDS, which later became a de facto standard for high-speed data transfer.
LVDS became popular in the mid 1990s. Before that, computer monitor resolutions were not large enough to need such fast data rates for graphics and video. However, in 1992 Apple Computer needed a method to transfer multiple streams of digital video without overloading the existing NuBus on the backplane. Apple and National Semiconductor created QuickRing, which was the first integrated circuit using LVDS. QuickRing was a high speed auxiliary bus for video data to bypass the NuBus in Macintosh computers. The multimedia and supercomputer applications continued to expand because both needed to move large amounts of data over links several meters long.
The first commercially successful application for LVDS was in notebook computers transmitting video data from graphics processing units to the flat panel displays using the Flat Panel Display Link by National Semiconductor. The first FPD-Link chipset reduced a 21-bit wide video interface plus the clock down to only 4 differential pairs, which enabled it to easily fit through the hinge between the display and the notebook and take advantage of LVDS's low-noise characteristics and fast data rate. FPD-Link became the de facto open standard for this notebook application in the late 1990s and was the dominant display interface in notebook and tablet computers until the early 2010s when it was succeeded by Embedded DisplayPort.
The applications for LVDS expanded to flat panel displays for consumer TVs as screen resolutions and color depths increased. To serve this application, FPD-Link chipsets continued to increase the data-rate and the number of parallel LVDS channels to meet the internal TV requirement for transferring video data from the main video processor to the display-panel's timing controller. FPD-Link once was the de facto standard for this internal TV interconnect but has since been usurped by modernized, more efficient interfaces such as MIPI DSI and eDP.
The next target application was transferring video streams through an external cable connection between a desktop computer and display, or a DVD player and a TV. NSC introduced higher performance follow-ons to FPD-Link called the LVDS Display Interface and OpenLDI standards. These standards allow a maximum pixel clock of 112 MHz, which suffices for a display resolution of 1400 × 1050 at 60 Hz refresh. A dual link can boost the maximum display resolution to 2048 × 1536 at 60 Hz. FPD-Link works with cable lengths up to about 5 m, and LDI extends this to about 10 m. However, Digital Visual Interface using TMDS over CML signals won the standards competition and became the standard for externally connecting desktop computers to monitors, and HDMI eventually became the standard for connecting digital video sources such as DVD players to flat panel displays in consumer applications.
Another successful LVDS application is Camera Link, which is a serial communication protocol designed for computer vision applications and based on the NSC chipset called Channel Link that uses LVDS. Camera Link standardizes video interfaces for scientific and industrial products including cameras, cables, and frame grabbers. The Automated Imaging Association maintains and administers the standard because it is the industry's global machine vision trade group.
More examples of LVDS used in computer buses are HyperTransport and FireWire, both of which trace their development back to the post-Futurebus work, which also led to SCI. In addition, LVDS is the physical layer signaling in SCSI standards to allow higher data rates and longer cable lengths. Serial ATA, RapidIO, and SpaceWire use LVDS to allow high speed data transfer.
Intel and AMD published a press release in December 2010 stating they would no longer support the LVDS LCD-panel interface in their product lines by 2013. They are promoting Embedded DisplayPort and Internal DisplayPort as their preferred solution. However, the LVDS LCD-panel interface has proven to be the lowest cost method for moving streaming video from a video processing unit to a LCD-panel timing controller within a TV or notebook, and in February 2018 LCD TV and notebook manufacturers continue to introduce new products using the LVDS interface.
LVDS was originally introduced as a 3.3 V standard. Scalable low voltage signaling has a lower common-mode voltage of 200 mV and a reduced p-p swing, but is otherwise the same as LVDS.

Comparing serial and parallel data transmission

LVDS works in both parallel and serial data transmission. In parallel transmissions multiple data differential pairs carry several signals at once including a clock signal to synchronize the data. In serial communications, multiple single-ended signals are serialized into a single differential pair with a data rate equal to that of all the combined single-ended channels. For example, a 7-bit wide parallel bus serialized into a single pair that will operate at 7 times the data rate of one single-ended channel. The devices for converting between serial and parallel data are the serializer and deserializer, abbreviated to SerDes when the two devices are contained in one integrated circuit.
As an example, FPD-Link actually uses LVDS in a combination of serialized and parallel communications. The original FPD-Link designed for 18-bit RGB video has 3 parallel data pairs and a clock pair, so this is a parallel communication scheme. However, each of the 3 pairs transfers 7 serialized bits during each clock cycle. So the FPD-Link parallel pairs are carrying serialized data, but use a parallel clock to recover and synchronize the data.
Serial data communications can also embed the clock within the serial data stream. This eliminates the need for a parallel clock to synchronize the data. There are multiple methods for embedding a clock into a data stream. One method is inserting 2 extra bits into the data stream as a start-bit and stop-bit to guarantee bit transitions at regular intervals to mimic a clock signal. Another method is 8b/10b encoding.