Fast Cycle DRAM
Fast Cycle DRAM is a type of synchronous dynamic random-access memory developed by Fujitsu and Toshiba. FCRAM has a shorter data access latency compared to contemporary commodity SDRAMs; and is used in where the lower data access latency is more desirable than low cost and high capacity. FCRAM achieves its low latency by dividing each row into multiple sub-rows, of which only one is activated during a row-activation operation. This had the effect of reducing the effective array size, improving the access time. FCRAM has a DDR SDRAM-like command set to enable memory controllers that support both DDR SDRAM and FCRAM. It also has a standard dual in-line memory module.
