List of electronic component packaging types


Integrated circuits and certain other electronic components are put into protective packages to allow easy handling and assembly onto printed circuit boards and to protect the devices from damage. A very large number of package types exist. Some package types have standardized dimensions and tolerances, and are registered with trade industry associations such as JEDEC and Pro Electron. Other types are proprietary designations that may be made by only one or two manufacturers. Integrated circuit packaging is the last assembly process before testing and shipping devices to customers.
Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier. In flip chip systems the IC is connected by solder bumps to a substrate. In beam-lead technology, the metallized pads that would be used for wire bonding connections in a conventional chip are thickened and extended to allow external connections to the circuit. Assemblies using "bare" chips have additional packaging or filling with epoxy to protect the devices from moisture.

Through-hole packages

Through-hole technology uses holes drilled through the printed circuit board for mounting the components. The component has leads that are soldered to pads on the PCB to electrically and mechanically connect them to the PCB.
AcronymFull nameRemark
SIPSingle in-line package
DIPDual in-line package pin spacing, rows or apart. Other row spacings are used much less frequently, like and.
CDIPCeramic DIP
CERDIPGlass-sealed ceramic DIP
QIPQuad in-line packageLike DIP but with staggered pins.
SKDIPSkinny DIPStandard DIP with pin spacing, rows apart.
SDIPShrink DIPNon-standard DIP with smaller pin spacing.
ZIPZig-zag in-line package
MDIPMolded DIP
PDIPPlastic DIP

Surface mount

AcronymFull nameRemark
CCGACeramic column-grid array
CGAColumn-grid array
CERPACKCeramic package
CQGPCeramic Quad Grid Array Package
LLPLead-less lead-frame packageA package with metric pin distribution
LGALand grid array
LTCCLow-temperature co-fired ceramic
MCMMulti-chip module
MICRO SMDXTMicro surface-mount device extended technology

Chip on board is a packaging technique that directly connects a die to a PCB, without an interposer or lead frame.

Chip carrier

A chip carrier is a rectangular package with contacts on all four edges. Leaded chip carriers have metal leads wrapped around the edge of the package, in the shape of a letter J. Leadless chip carriers have metal pads on the edges. Chip carrier packages may be made of ceramic or plastic and are usually secured to a printed circuit board by soldering, though sockets can be used for testing.
AcronymFull nameRemark
BCCBump chip carrier
CLCCCeramic lead-less chip carrier
LCCLead-less chip carrierContacts are recessed vertically.
LCCLeaded chip carrier
LCCCLeaded ceramic-chip carrier
DLCCDual lead-less chip carrier
PLCCPlastic leaded chip carrier

Pin grid arrays

AcronymFull nameRemark
OPGAOrganic pin-grid array
FCPGAFlip-chip pin-grid array
PGAPin-grid arrayAlso known as PPGA
CPGACeramic pin-grid array

Flat packages

AcronymFull nameRemark
Flat-packEarliest version metal/ceramic packaging with flat leads
CFPCeramic flat-pack
CQFPCeramic quad flat-packSimilar to PQFP
BQFPBumpered quad flat-pack
DFNDual flat-packNo lead
ETQFPExposed thin quad flat-package
PQFNPower quad flat-packNo-leads, with exposed die-pad for heatsinking
PQFPPlastic quad flat-package
LQFPLow-profile quad flat-package
QFNQuad flat no-leads packageAlso called as micro lead frame.
QFPQuad flat package
MQFPMetric quad flat-packQFP with metric pin distribution
HVQFNHeat-sink very-thin quad flat-pack, no-leads
SIDEBRAZE
TQFPThin quad flat-pack
VQFPVery-thin quad flat-pack
TQFNThin quad flat, no-lead
VQFNVery-thin quad flat, no-lead
WQFNVery-very-thin quad flat, no-lead
UQFNUltra-thin quad flat-pack, no-lead
ODFNOptical dual flat, no-leadIC packaged in transparent packaging used in optical sensor

Small outline packages

A small outline integrated circuit is a surface-mounted integrated circuit package which occupies an area about 30–50% less than an equivalent dual in-line package, with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs.
AcronymFull nameRemark
SOPSmall-outline package
CSOPCeramic small-outline package
DSOPDual small-outline package
HSOPThermally-enhanced small-outline package
HSSOPThermally-enhanced shrink small-outline package
HTSSOPThermally-enhanced thin shrink small-outline package
mini-SOICMini small-outline integrated circuit-
MSOPMini small-outline packageMaxim uses the trademarked name μMAX for MSOP packages
PSOPPlastic small-outline package
PSONPlastic small-outline no-lead package
QSOPQuarter-size small-outline packageThe terminal pitch is 0.635 mm.
SOICSmall-outline integrated circuitAlso known as SOIC (JEDEC)|SOIC NARROW] and SOIC WIDE
SOJSmall-outline J-leaded package-
SONSmall-outline no-lead package
SSOPShrink small-outline package
TSOPThin small-outline package
TSSOPThin shrink small-outline package
TVSOPThin very-small-outline package
VSOPVery-small-outline package
VSSOPVery-thin shrink small-outline packageAlso referred as MSOP = micro small-outline package
WSONVery-very-thin small-outline no-lead package
USONVery-very-thin small-outline no-lead packageSlightly smaller than WSON

Chip-scale packages

According to IPC's standard J-STD-012, Implementation of Flip Chip and Chip Scale Technology, in order to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die and it must be a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1 mm.
AcronymFull nameRemark
BLBeam lead technologyBare silicon chip, an early chip-scale package
CSPChip-scale packagePackage size is no more than 1.2× the size of the silicon chip
TCSPTrue chip-size packagePackage is same size as silicon
TDSPTrue die-size packageSame as TCSP
WCSP or WL-CSP or WLCSPWafer-level chip-scale packageA WL-CSP or WLCSP package is just a bare die with a redistribution layer to rearrange the pins or contacts on the die so that they can be big enough and have sufficient spacing so that they can be handled just like a BGA package.
PMCPPower mount CSP Variation of WLCSP, for power devices like MOSFETs. Made by Panasonic.
Fan-out WLCSPFan-out wafer-level packagingVariation of WLCSP. Like a BGA package but with the interposer built directly atop the die and encapsulated alongside it.
eWLBEmbedded wafer level ball grid arrayVariation of WLCSP.
MICRO SMD-Chip-size package developed by National Semiconductor
COBChip on boardBare die supplied without a package. It is mounted directly to the PCB using bonding wires and covered with a blob of black Epoxy. Also used for LEDs. In LEDs, transparent epoxy or a silicon caulk-like material that may contain a phosphor is poured into a mold containing the LED and cured. The mold forms part of the package.
COFChip-on-flexVariation of COB, where a chip is mounted directly to a flex circuit. Unlike COB, it may not use wires nor be covered with epoxy, using underfill instead.
TABTape-automated bondingVariation of COF, where a flip chip is mounted directly to a flex circuit without the use of bonding wires. Used by LCD driver ICs.
COGChip-on-glassVariation of TAB, where a chip is mounted directly to a piece of glass - typically an LCD. Used by LCD and OLED driver ICs.

Ball grid array

Ball grid array uses the underside of the package to place pads with balls of solder in grid pattern as connections to PCB.
AcronymFull nameRemark
FBGAFine-pitch ball-grid arrayA square or rectangular array of solder balls on one surface
LBGALow-profile ball-grid arrayAlso known as laminate ball-grid array
TEPBGAThermally-enhanced plastic ball-grid array
CBGACeramic ball-grid array
OBGAOrganic ball-grid array
TFBGAThin fine-pitch ball-grid array
PBGAPlastic ball-grid array
MAP-BGAMold array process - ball-grid array
UCSPMicro chip-scale packageSimilar to a BGA
μBGAMicro ball-grid arrayBall spacing less than 1 mm
LFBGALow-profile fine-pitch ball-grid array
TBGAThin ball-grid array
SBGASuper ball-grid arrayAbove 500 balls
UFBGAUltra-fine ball-grid array

Transistor, diode, small-pin-count IC packages

  • MELF: Metal electrode leadless face
  • SOD: Small-outline diode
  • SOT: Small-outline transistor
  • TO-XX: wide range of small pin count packages often used for discrete parts like transistors or diodes
  • * TO-3: Panel-mount with leads
  • * TO-5: Metal can package with radial leads
  • * TO-18: Metal can package with radial leads
  • * TO-39: Similar to TO-5 with shorter leads
  • * TO-46: Similar to TO-18 with lower cap height
  • * TO-66: Similar shape to the TO-3 but smaller
  • * TO-92: Plastic-encapsulated package with three leads
  • * TO-99: Metal can package with eight radial leads
  • * TO-100: Metal can package with ten radial leads, similar to TO-99
  • * TO-126: Plastic-encapsulated package with three leads and a hole for mounting on a heat sink
  • * TO-220: Through-hole plastic package with a metal heat sink tab and three leads
  • * TO-226
  • * TO-247: Plastic-encapsulated package with three leads and a hole for mounting on a heat sink
  • * TO-251: Also called IPAK: SMT package similar to the DPAK but with longer leads for SMT or TH mounting
  • * TO-252: :
  • * TO-262: Also called I2PAK: SMT package similar to the D2PAK but with longer leads for SMT or TH mounting
  • * TO-263: Also called D2PAK: SMT package similar to the TO-220 without the extended tab and mounting hole
  • * TO-274: Also called Super-247: SMT package similar to the TO-247 without the mounting hole

Package dimensions

All measurements below are given in mm. To convert mm to mils, divide mm by 0.0254.
; C: Clearance between package body and PCB.
; H: Height of package from pin tip to top of package.
; T: Thickness of pin.
; L: Length of package body only.
; LW: Pin width.
; LL: Pin length from package to pin tip.
; P: Pin pitch.
; WB: Width of the package body only.
; WL: Length from pin tip to pin tip on the opposite side.

Multi-chip packages

A variety of techniques for interconnecting several chips within a single package have been proposed and researched:

By terminal count

Surface-mount components are usually smaller than their counterparts with leads, and are designed to be handled by machines rather than by humans. The electronics industry has standardized package shapes and sizes.
The codes given in the chart below usually tell the length and width of the components in tenths of millimeters or hundredths of inches. For example, a metric 2520 component is 2.5 mm by 2.0 mm which corresponds roughly to 0.10 inches by 0.08 inches. Exceptions occur for imperial in the two smallest rectangular passive sizes. The metric codes still represent the dimensions in mm, even though the imperial size codes are no longer aligned. Problematically, some manufacturers are developing metric 0201 components with dimensions of, but the imperial 01005 name is already being used for the package. These increasingly small sizes, especially 0201 and 01005, can sometimes be a challenge from a manufacturability or reliability perspective.

Two-terminal packages

Rectangular passive components

Mostly resistors and capacitors.

Tantalum capacitors

PackageDimensions
EIA 2012-12 2.0 mm × 1.3 mm × 1.2 mm
EIA 3216-10 3.2 mm × 1.6 mm × 1.0 mm
EIA 3216-12 3.2 mm × 1.6 mm × 1.2 mm
EIA 3216-18 3.2 mm × 1.6 mm × 1.8 mm
EIA 3528-12 3.5 mm × 2.8 mm × 1.2 mm
EIA 3528-21 3.5 mm × 2.8 mm × 2.1 mm
EIA 6032-15 6.0 mm × 3.2 mm × 1.5 mm
EIA 6032-28 6.0 mm × 3.2 mm × 2.8 mm
EIA 7260-38 7.2 mm × 6.0 mm × 3.8 mm
EIA 7343-20 7.3 mm × 4.3 mm × 2.0 mm
EIA 7343-31 7.3 mm × 4.3 mm × 3.1 mm
EIA 7343-43 7.3 mm × 4.3 mm × 4.3 mm

Aluminum capacitors

PackageDimensions
Cornell-Dubilier A3.3 mm × 3.3 mm × 5.5 mm
Chemi-Con D4.3 mm × 4.3 mm × 5.7 mm
Panasonic B4.3 mm × 4.3 mm × 6.1 mm
Chemi-Con E5.3 mm × 5.3 mm × 5.7 mm
Panasonic C5.3 mm × 5.3 mm × 6.1 mm
Chemi-Con F6.6 mm × 6.6 mm × 5.7 mm
Panasonic D6.6 mm × 6.6 mm × 6.1 mm
Panasonic E/F, Chemi-Con H8.3 mm × 8.3 mm × 6.5 mm
Panasonic G, Chemi-Con J10.3 mm × 10.3 mm × 10.5 mm
Chemi-Con K13 mm × 13 mm × 14 mm
Panasonic H13.5 mm × 13.5 mm × 14 mm
Panasonic J, Chemi-Con L17 mm × 17 mm × 17 mm
Panasonic K, Chemi-Con M19 mm × 19 mm × 17 mm

Metal electrode leadless face (MELF)

Mostly resistors and diodes; barrel shaped components, dimensions do not match those of rectangular references for identical codes.

DO-214

Commonly used for rectifier, Schottky, and other diodes.
PackageDimensions
DO-214AA 5.4 mm × 3.6 mm × 2.65 mm
DO-214AB 7.95 mm × 5.9 mm × 2.25 mm
DO-214AC 5.2 mm × 2.6 mm × 2.15 mm

Three- and four-terminal packages

Small-outline transistor (SOT)

PackageAliasesDimensions Number of terminalsRemark
SOT-23-3TO-236-3, SC-592.92 mm × 1.3 mm × 1.12 mm3
SOT-89TO-243, SC-624.5 mm × 2.5 mm × 1.5 mm4Center pin is connected to a large heat-transfer pad
SOT-143TO-2532.9 mm × 1.3 mm × 1.22 mm4Tapered body, one larger pad denotes terminal 1
SOT-223TO-2616.5 mm × 3.5 mm × 1.8 mm4One terminal is a large heat-transfer pad
SOT-323SC-702 mm × 1.25 mm × 1.1 mm3
SOT-416SC-751.6 mm × 0.8 mm × 0.9 mm3
SOT-6631.6 mm × 1.2 mm × 0.6 mm3
SOT-7231.2 mm × 0.8 mm × 0.553Has flat leads
SOT-883SC-1011 mm × 0.6 mm × 0.5 mm3Is lead-less

Other

  • DPAK : Discrete Packaging. Developed by Motorola to house higher powered devices. Comes in three or five-terminal versions.
  • D2PAK : Bigger than the DPAK; basically a surface mount equivalent of the TO220 through-hole package. Comes in 3, 5, 6, 7, 8 or 9-terminal versions.
  • D3PAK : Even larger than D2PAK.

Five- and six-terminal packages

Small-outline transistor (SOT)

PackageAliasesDimensions Number of terminalsLeaded or leadless
SOT-23-6SOT-26, SC-742.9 mm × 1.3 mm × 1.3 mm6Leaded
SOT-353SC-88A2 mm × 1.25 mm × 0.95 mm5Leaded
SOT-363SC-88, SC-70-62 mm × 1.25 mm × 0.95 mm6Leaded
SOT-5631.6 mm × 1.2 mm × 0.6 mm6Leaded
SOT-6651.6 mm × 1.6 mm × 0.55 mm5Leaded
SOT-6661.6 mm × 1.2 mm × 0.6 mm6Leaded
SOT-8861.45 mm × 1 mm × 0.5 mm6Leadless
SOT-8911 mm × 1 mm × 0.5 mm6Leadless
SOT-9531 mm × 0.8 mm × 0.5 mm5Leaded
SOT-9631 mm × 1 mm × 0.5 mm6Leaded
SOT-11151 mm × 0.9 mm × 0.35 mm6Leadless
SOT-12021 mm × 1 mm × 0.35 mm6Leadless

Packages with more than six terminals

Dual-in-line

Quad-in-line

  • Plastic leaded chip carrier : square, J-lead, pin spacing 1.27 mm
  • Quad flat package : various sizes, with pins on all four sides
  • Low-profile quad flat-package : 1.4 mm high, varying sized and pins on all four sides
  • Plastic quad flat-pack, a square with pins on all four sides, 44 or more pins
  • Ceramic quad flat-pack : similar to PQFP
  • Metric quad flat-pack : a QFP package with metric pin distribution
  • Thin quad flat-pack, a thinner version of LQFP
  • Quad flat no-lead : smaller footprint than leaded equivalent
  • Leadless chip carrier : contacts are recessed vertically to "wick-in" solder. Common in aviation electronics because of robustness to mechanical vibration.
  • Micro leadframe package : with a 0.5 mm contact pitch, no leads
  • Power quad flat no-lead : with exposed die-pads for heatsinking

Grid arrays

  • Ball grid array : A square or rectangular array of solder balls on one surface, ball spacing typically
  • * Fine-pitch ball grid array : A square or rectangular array of solder balls on one surface
  • * Low-profile fine-pitch ball grid array : A square or rectangular array of solder balls on one surface, ball spacing typically 0.8 mm
  • * Micro ball grid array : Ball spacing less than 1 mm
  • * Thin fine-pitch ball grid array : A square or rectangular array of solder balls on one surface, ball spacing typically 0.5 mm
  • Land grid array : An array of bare lands only. Similar to in appearance to QFN, but mating is by spring pins within a socket rather than solder.
  • Column grid array : A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern.
  • * Ceramic column grid array : A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern. The body of the component is ceramic.
  • Lead-less package : A package with metric pin distribution.

Non-packaged devices

Although surface-mount, these devices require specific process for assembly.
  • Chip-on-board (COB), a bare silicon chip, that is usually an integrated circuit, is supplied without a package and is attached, often with epoxy, directly to a circuit board. The chip is then wire bonded and protected from mechanical damage and contamination by an epoxy "glob-top".
  • Chip-on-flex, a variation of COB, where a chip is mounted directly to a flex circuit. Tape-automated bonding process is also a chip-on-flex process as well.
  • Chip-on-glass, a variation of COB, where a chip, typically a liquid crystal display controller, is mounted directly on glass.
  • Chip-on-wire, a variation of COB, where a chip, typically a LED or RFID chip, is mounted directly on wire, thus making it a very thin and flexible wire. Such wire may then be covered with cotton, glass or other materials to make into smart textiles or electronic textiles.
There are often subtle variations in package details from manufacturer to manufacturer, and even though standard designations are used, designers need to confirm dimensions when laying out printed circuit boards.