Small outline integrated circuit
A small outline integrated circuit is a surface-mounted integrated circuit package which occupies an area about 30–50% less than an equivalent dual in-line package, with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs. The convention for naming the package is SOIC or SO followed by the number of pins. For example, a 14-pin 4011 would be housed in an SOIC-14 or SO-14 package.
JEDEC and JEITA/EIAJ standards
Small outline actually refers to IC packaging standards from at least two different organizations:- JEDEC:
- * PLASTIC DUAL SMALL OUTLINE GULL WING, 1.27 MM PITCH PACKAGE, 3.9 MM BODY WIDTH.
- * VERY THICK PROFILE, PLASTIC SMALL OUTLINE FAMILY, 1.27 MM PITCH, 7.50 MM BODY WIDTH.
- JEITA :
- * .
However, at least Texas Instruments and Fairchild Semiconductor consistently refer to JEDEC 3.9 and 7.5 mm width parts as "SOIC" and to EIAJ Type II 5.3 mm width parts as "SOP".
General package characteristics
The SOIC package is shorter and narrower than DIP, the side-to-side pitch being 6 mm for an SOIC-14, and the body width being 3.9 mm. These dimensions differ depending on the SOIC in question, and there are several variants. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 in.SOIC (JEDEC)
The picture below shows the general shape of a SOIC narrow package, with major dimensions. The values of these dimensions for common SOICs is shown in the table.[Image:SOIC Dimensions.gif|left|A general SOIC, with major dimensions]
| C | Clearance between IC body and PCB |
| H | Total carrier height |
| T | Lead thickness |
| L | Total carrier length |
| LW | Lead width |
| LL | Lead length |
| P | Pitch |
| WB | IC body width |
| WL | Lead-to-lead width |
| O | End overhang |
| Package | WB | WL | H | C | L | P | LL | T | LW | O |
| SOIC-8-N | 3.8–4.0 | 5.8–6.2 | 1.35–1.75 | 0.10–0.25 | 4.8–5.0 | 1.27 | 0.41 | 0.19–0.25 | 0.35–0.51 | 0.33 |
| SOIC-14-N | 3.8–4.0 | 5.8–6.2 | 1.35–1.75 | 0.10–0.25 | 8.55–8.75 | 1.27 | 1.05 | 0.19–0.25 | 0.39–0.46 | 0.3–0.7 |
| SOIC-16-N | 3.8–4.0 | 5.8–6.2 | 1.35–1.75 | 0.10–0.25 | 9.8–10.0 | 1.27 | 1.05 | 0.19–0.25 | 0.39–0.46 | 0.3–0.7 |
SOP (JEITA/EIAJ)
These are sometimes called "wide SOIC", as opposed to the narrower JEDEC MS-012, but they in turn are narrower than the JEDEC MS-013, which may also be called "wide SOIC".| Package | WB | WL |
| SOIC-8 | 5.41 | 8.07 |
Next to the narrow SOIC package, there's also the wide version. This package is commonly represented as SOx_W or SOICx_W.
The difference is mainly related to the parameters WB and WL.
As an example, the values WB and WL are given for an 8-pins wide SOIC package.
mini-SOIC
| Package | WB | WL | H | C | L | P | LL | T | LW |
| miniSOIC-10 | 3.0 | 4.9 | 1.09 | 0.10 | 3.0 | 0.5 | 0.95 | 0.19 | 0.23 |
Another SOIC variant, available only for 8-pin and 10-pin ICs, is the mini-SOIC, also called micro-SOIC. This case is much smaller, with a pitch of only 0.5 mm. See the table for the 10-pin model.
An excellent overview of different semiconductor packages is provided by National Semiconductor.
Small-outline J-leaded package (SOJ)
Small-outline J-leaded package is a version of SOIC with J-type leads instead of gull-wing leads.Smaller form factors
After SOIC came a family of smaller form factors with pin spacings less than 1.27 mm:- Thin small outline package
- Thin-shrink small outline package
Shrink small-outline package (SSOP)
Shrink small-outline package chips have "gull wing" leads protruding from the two long sides, and a lead spacing of 0.65mm or 0.635mm. 0.5mm lead spacing is less common, but not rare.The body size of a SOP was compressed and the lead pitch tightened to obtain a smaller version SOP. This yields an IC package with a significant reduction in the size compared to standard package. All IC assembly processes remain the same as with standard SOPs.
Applications for a SSOP enable end-products to be reduced in size and mass. Semiconductor families such as operational amplifiers, drivers, optoelectronics, controllers, logic, analog, memory, comparators and more using BiCMOS, CMOS or other silicon / GaAs technologies are well addressed by the SSOP product family.
Thin small-outline package (TSOP)
A thin small-outline package is a rectangular, thin-bodied component. A Type I TSOP has legs protruding from the width portion of the package. A Type II TSOP has the legs protruding from the length portion of the package. The ICs on DRAM memory modules were usually TSOPs until they were replaced by ball grid array.Thin-shrink small-outline package (TSSOP)
[Image:TSSOP EXP PAD 16L.gif|thumb|300px|ExposedPAD TSSOP-16]A thin-shrink small-outline package (TSSOP) is a rectangular, thin-body component. A TSSOP's leg count can range from 8 to 64.
TSSOPs are particularly suited for gate drivers, controllers, wireless / RF, op-amps, logic, analog, ASICs, memory, comparators and optoelectronics. Memory modules, disk drives, recordable optical disks, telephone handsets, speed dialers, video / audio and consumer electronics / appliances are suggested uses for TSSOP packaging.