Signed number representations

In computing, signed number representations are required to encode negative numbers in binary number systems.
In mathematics, negative numbers in any base are represented by prefixing them with a minus sign. However, in RAM or CPU registers, numbers are represented only as sequences of bits, without extra symbols. The four best-known methods of extending the binary numeral system to represent signed numbers are: sign–magnitude, [|ones' complement], [|two's complement], and [|offset binary]. Some of the alternative methods use implicit instead of explicit signs, such as negative binary, using the [|base −2]. Corresponding methods can be devised for other bases, whether positive, negative, fractional, or other elaborations on such themes.
There is no definitive criterion by which any of the representations is universally superior. For integers, the representation used in most current computing devices is two's complement, although the Unisys ClearPath Dorado series mainframes use ones' complement.

History

The early days of digital computing were marked by competing ideas about both hardware technology and mathematics technology. One of the great debates was the format of negative numbers, with some of the era's top experts expressing very strong and differing opinions. One camp supported two's complement, the system that is dominant today. Another camp supported ones' complement, where a negative value is formed by inverting all of the bits in its positive equivalent. A third group supported sign–magnitude, where a value is changed from positive to negative simply by toggling the word's highest-order bit.
There were arguments for and against each of the systems. Sign–magnitude allowed for easier tracing of memory dumps as small numeric values use fewer 1 bits. These systems did ones' complement math internally, so numbers would have to be converted to ones' complement values when they were transmitted from a register to the math unit and then converted back to sign–magnitude when the result was transmitted back to the register. The electronics required more gates than the other systemsa key concern when the cost and packaging of discrete transistors were critical. IBM was one of the early supporters of sign–magnitude, with their 704, 709 and 709x series computers being perhaps the best-known systems to use it.
Ones' complement allowed for somewhat simpler hardware designs, as there was no need to convert values when passed to and from the math unit. But it also shared an undesirable characteristic with sign–magnitude: the ability to represent negative zero. Negative zero behaves exactly like positive zero: when used as an operand in any calculation, the result will be the same whether an operand is positive or negative zero. The disadvantage is that the existence of two forms of the same value necessitates two comparisons when checking for equality with zero. Ones' complement subtraction can also result in an end-around borrow. It can be argued that this makes the addition and subtraction logic more complicated or that it makes it simpler, as a subtraction requires simply inverting the bits of the second operand as it is passed to the adder. The PDP-1, CDC 160 series, CDC 3000 series, CDC 6000 series, UNIVAC 1100 series, and LINC computer use ones' complement representation.
Two's complement is the easiest to implement in hardware, which may be the ultimate reason for its widespread popularity. Processors on the early mainframes often consisted of thousands of transistors, so eliminating a significant number of transistors was a significant cost savings. Mainframes such as the IBM System/360, the GE-600 series, and the PDP-6 and PDP-10 use two's complement, as did minicomputers such as the PDP-5 and PDP-8 and the PDP-11 and VAX machines. The architects of the early integrated-circuit-based CPUs also chose to use two's complement math. As IC technology advanced, two's complement technology was adopted in virtually all processors, including x86, m68k, Power ISA, MIPS, SPARC, ARM, Itanium, PA-RISC, and DEC Alpha.

Sign–magnitude

Binary value	Sign–magnitude interpretation	Unsigned interpretation
	0	0
	1	1
⋮	⋮	⋮
	125	125
	126	126
	127	127
	−0	128
	−1	129
	−2	130
⋮	⋮	⋮
	−125	253
	−126	254
	−127	255

In the sign–magnitude representation, also called sign-and-magnitude or signed magnitude, a signed number is represented by the bit pattern corresponding to the sign of the number for the sign bit, and the magnitude of the number for the remaining bits. For example, in an eight-bit byte, only seven bits represent the magnitude, which can range from 0000000 to 1111111. Thus numbers ranging from −127₁₀ to +127₁₀ can be represented once the sign bit is added. For example, −43₁₀ encoded in an eight-bit byte is 10101011 while 43₁₀ is 00101011. Using sign–magnitude representation has multiple consequences which makes them more intricate to implement:

There are two ways to represent zero, and .
Addition and subtraction require different behavior depending on the sign bit, whereas ones' complement can ignore the sign bit and just do an end-around carry, and two's complement can ignore the sign bit and depend on the overflow behavior.
Comparison also requires inspecting the sign bit, whereas in two's complement, one can simply subtract the two numbers, and check if the outcome is positive or negative.
The minimum negative number is −127, instead of −128 as in the case of two's complement.

This approach is directly comparable to the common way of showing a sign. Some early binary computers use this representation, perhaps because of its natural relation to common usage. Sign–magnitude is the most common way of representing the significand in floating-point values.

Ones' complement

Binary value	Ones' complement interpretation	Unsigned interpretation
	0	0
	1	1
⋮	⋮	⋮
	125	125
	126	126
	127	127
	−127	128
	−126	129
	−125	130
⋮	⋮	⋮
	−2	253
	−1	254
	−0	255

In the ones' complement representation, a negative number is represented by the bit pattern corresponding to the bitwise NOT of the positive number. Like sign–magnitude representation, ones' complement has two representations of 0: and .
As an example, the ones' complement form of becomes . The range of signed numbers using ones' complement is represented by to and ±0. A conventional eight-bit byte is −127₁₀ to +127₁₀ with zero being either or .
To add two numbers represented in this system, one does a conventional binary addition, but it is then necessary to do an end-around carry: that is, add any resulting carry back into the resulting sum. To see why this is necessary, consider the following example showing the case of the addition of −1 to +2 :
In the previous example, the first binary addition gives, which is incorrect. The correct result only appears when the carry is added back in.
A remark on terminology: The system is referred to as "ones' complement" because the negation of a positive value x can also be formed by subtracting x from the ones' complement representation of zero that is a long sequence of ones. Two's complement arithmetic, on the other hand, forms the negation of x by subtracting x from a single large power of two that is congruent to +0. Therefore, ones' complement and two's complement representations of the same negative value will differ by one.
Note that the ones' complement representation of a negative number can be obtained from the sign–magnitude representation merely by bitwise complementing the magnitude. For example, the decimal number −125 with its sign–magnitude representation can be represented in ones' complement form as.

Two's complement

Binary value	Two's complement interpretation	Unsigned interpretation
	0	0
	1	1
⋮	⋮	⋮
	126	126
	127	127
	−128	128
	−127	129
	−126	130
⋮	⋮	⋮
	−2	254
	−1	255

In the two's complement representation, a negative number is represented by the bit pattern corresponding to the bitwise NOT of the positive number plus one, i.e. to the ones' complement plus one. It circumvents the problems of multiple representations of 0 and the need for the end-around carry of the ones' complement representation. This can also be thought of as the most significant bit representing the inverse of its value in an unsigned integer; in an 8-bit unsigned byte, the most significant bit represents the 128ths place, where in two's complement that bit would represent −128.
In two's-complement, there is only one zero, represented as. Negating a number is done by inverting all the bits and then adding one to that result. This actually reflects the ring structure on all integers modulo 2^N:. Addition of a pair of two's-complement integers is the same as addition of a pair of unsigned numbers ; the same is true for subtraction and even for N lowest significant bits of a product. For instance, a two's-complement addition of 127 and −128 gives the same binary bit pattern as an unsigned addition of 127 and 128, as can be seen from the 8-bit two's complement table.
An easier method to get the negation of a number in two's complement is as follows:

	Example 1	Example 2
1. Starting from the right, find the first "1"
2. Invert all of the bits to the left of that "1"

Method two:

Invert all the bits through the number. This computes the same result as subtracting from negative one.
Add one

Example: for +2, which is in binary :

~ →
+ 1 →