Memory management unit
A memory management unit, sometimes called paged memory management unit, is a computer hardware unit that examines all references to memory, and translates the memory addresses being referenced, known as virtual memory addresses, into physical addresses in main memory.
In modern systems, programs generally have addresses that access the theoretical maximum memory of the computer architecture, 32 or 64 bits. The MMU maps the addresses from each program into separate areas in physical memory, which is generally much smaller than the theoretical maximum. This is possible because programs rarely use large amounts of memory at any one time.
Most modern operating systems work in concert with an MMU to provide virtual memory support.
The MMU tracks memory use in fixed-size blocks known as pages.
If a program refers to a location in a page that is not in physical memory, the MMU sends an interrupt to the operating system.
The OS selects a lesser-used block in memory, writes it to backing storage such as a hard drive if it has been modified since it was read in, reads the page from backing storage into that block, and sets up the MMU to map the block to the originally requested page so the program can use it.
This is known as demand paging.
Some simpler real-time operating systems do not support virtual memory and do not need an MMU, but still need a hardware memory protection unit.
MMUs generally provide memory protection to block attempts by a program to access memory it has not previously requested, which prevents a misbehaving or malicious program from modifying or reading data belonging to another program.
In some early microprocessor designs, memory management was performed by a separate integrated circuit such as the VLSI Technology VI475, the Motorola 68851 used with the Motorola 68020 CPU in the Macintosh II, or the Z8010 and Z8015 used with the Zilog Z8000 family of processors. Later microprocessors placed the MMU together with the CPU on the same integrated circuit, as did the Intel 80286 and later x86 microprocessors.
Some early systems, especially 8-bit systems, used very simple MMUs to perform bank switching.
Types of address translation
Early systems used base and bounds addressing that further developed into segmentation, or used a fixed set of blocks instead of loading them on demand. The difference between these two approaches is the size of the contiguous block of memory; paged systems break up main memory into a series of equal sized blocks, while segmented systems generally allow for variable sizes.Segmented translation
In segmented translation, a memory address contains a segment number and an offset within the segment. Segments are variable-length, and may have permissions, such as read, write, and execute, associated with them. A segment is loaded into a contiguous area of physical memory. Typically, the segment number is used as an index into a segment table; each entry in the segment table holds the address of the area of physical memory, the length of the segment, and other information such as permission flags.This style has the advantage of simplicity; the memory blocks are continuous and thus only the two values, base and limit, need to be stored for mapping purposes.
The disadvantage of this approach is that it leads to an effect known as external fragmentation. This occurs when memory allocations are released but are non-contiguous. In this case, enough memory may be available to handle a request, but this is spread out and cannot be allocated to a single segment. On systems where programs start and stop over time, this can eventually lead to memory being highly fragmented and no large blocks remaining; in this case, segments would need to be moved in memory, and their segment table entries modified to reflect the new physical address, to make a contiguous space large enough for a segment available.
Some models of the PDP-11 16-bit minicomputer have a segmented memory management unit with a set of page address registers and page description registers ; this maps an 16-bit virtual address to an 18-bit physical address. The PDP-11/70 expands that to produce a 22-bit physical address.
Segmenting was widely used on microcomputer platforms of the 1980s. Among the MMUs that used this concept were the Motorola 68451 and the Zilog Z8010, but many other examples exist.
The Intel 8086, Intel 8088, Intel 80186, and Intel 80188 provide crude memory segmentation and no memory protection. The 16-bit segment registers allow for 65,536 segments; each segment begins at a fixed offset equal to 16 times the segment number; the segment starting address granularity is 16 bytes. Each segment grants read-write access to 64 KiB of address space. Offset+address exceeding 0xFFFFF wraps around to 0x00000. Each 64 KiB segment overlaps the next 4,095 segments; each physical address can be denoted by 4,096 segment–offset pairs. This scheme can address only 1 MiB of physical memory. Later x86 processors, starting with the Intel 80286, supported real segmented mapping, with a segment table.
Paged translation
In paged translation, the address space is divided into pages, each having a size which is a power of 2, usually a few kilobytes, but they may be much larger. Programs reference memory using the natural address size of the machine, typically 32 or 64 bits in modern systems. The bottom bits of the address are left unchanged. The upper address bits are the virtual page numbers.Most MMUs use an in-memory table of items called a page table, containing one page table entry per virtual page, to map virtual page numbers to physical page numbers in main memory. Multi-level page tables are often used to reduce the size of the page table. An associative cache of PTEs is called a translation lookaside buffer and is used to avoid the necessity of accessing the main memory every time a virtual address is mapped.
Other MMUs may have a private array of memory, a set of registers, or a one-or-more-level array of static RAM to store a set of mapping information.
The MMU splits the virtual address into a virtual page number and an offset within the page. The virtual page number is used to select a page table entry; if the page table entry is found, and the page is marked as being in memory, the physical page number in the page table entry is combined with the offset to construct the physical address corresponding to the virtual address.
The virtual page number may be directly used as an index into the page table or other mapping information, or it may be further divided, with bits at a given level used as an index into a table of lower-level tables into which bits at the next level down are used as an index, with two or more levels of indexing.
One issue with paged translation is that as the virtual address space expands, the amount of memory needed to hold the mapping increases as well.
For instance, in the 68020 the addresses are 32 bits wide, meaning the virtual page number for an 8 kB page size is the upper 19 bits of the address, and a single-level page table would be 512 kB in size. In the 1980s, for an in-memory page table, this might be a significant fraction of the main memory of the machine, and, for an MMU that holds the page map in static RAM, might require a costly amount of static RAM.
This problem can be reduced by making the pages larger, say 64 kB instead of 8.
Now the page index uses 16 bits and the resulting page table is 64 kB, which is more tractable.
Moving to a larger page size leads to the second problem: increased internal fragmentation.
A program that generates a series of requests for small blocks will be assigned large blocks and thereby waste large amounts of memory.
If the address space is sparse, so that not all regions of it are allocated, the problem can be reduced by using a multi-level page table or static RAM map, and not allocate all the page table entries that would be needed for an empty region.
The paged translation approach was widely used by microprocessor MMUs in the 1970s and 1980s, including the 68020's 68851 and the on-chip MMU of the 68030, the Zilog Z8000's Z8015, and the NS32000 series's NS16082.
A page table entry or other per-page information may also include information about whether the page has been written to, when it was last used, what kind of processes may read and write it, and whether it should be cached.
Sometimes, a page table entry or other per-page information prohibits access to a particular virtual page, perhaps because no physical random-access memory has been allocated to that virtual page. In this case, the MMU signals a page fault to the CPU. The operating system then handles the situation, perhaps by trying to find a spare frame of RAM and set up the page map to map it to the requested virtual address. If no RAM is free, it may be necessary to choose an existing page, using some replacement algorithm, and save it to disk. With some MMUs, there can also be a shortage of PTEs, in which case the OS will have to free one for the new mapping.
The MMU may also generate illegal access error conditions or invalid page faults upon illegal or non-existing memory accesses, respectively, leading to segmentation fault or bus error conditions when handled by the operating system.
Paged translation mitigates the problem of external fragmentation of memory. After blocks of memory have been allocated and freed, the free memory may become fragmented so that the largest contiguous block of free memory may be much smaller than the total amount. With virtual memory, a contiguous range of virtual addresses can be mapped to several non-contiguous blocks of physical memory; this non-contiguous allocation is one of the benefits of paging.
However, paged translation causes another problem, internal fragmentation. This occurs when a program requests a block of memory that does not cleanly map into a page, for instance, if a program requests a 1 KB buffer to perform file work. In this case, the request results in an entire page being set aside even though only 1 KB of the page will ever be used; if pages are larger than 1 KB, the remainder of the page is wasted. If many small allocations of this sort are made, memory can be used up even though much of it remains empty.