Development of Resynthesis Flow for Improving Logical Masking Features of Combinational Circuits
Development of Resynthesis Flow for Improving Logical Masking Features of Combinational Circuits is a scholarly work, published in 2018 in ''Problems of advanced micro- and nanoelectronic systems development''. The main subjects of the publication include logic gate, electronic circuit, masking, performance indicator, computer science, low-power electronics, electronic engineering, observability, combinational logic, algorithm, fault tolerance, digital electronics, sensitivity, and redundancy. The paper is devoted to development of combinational circuits resynthesis flow aimed at soft error tolerance improvement.