AN/AYK-14


The AN/AYK-14 is a family of computers for use in military weapons systems. It is a general-purpose 16-bit microprogrammed computer, designed in 1976 by Control Data Corporation Aerospace Division in Bloomington, Minnesota intended for airborne vehicles and missions. Its modular design provides for common firmware and support software. It is still in use on Navy fleet aircraft including the F/A-18, and the AV-8B. The AN/AYK-14 family of systems is designed to meet military standard MIL-E-5400 requirements.

General information

The AYK-14 computer was designed for military weapons systems, capable of operating at altitudes up to 70,000 feet and in temperatures ranging from −54 °C to 71 °C. A complete AN/AYK-14 computer system is composed of processor, memory and input/output modules. The 16-bit CPU is based on the AMD 2900 series chips, capable of running between 0.3 and 2.3 mega-instructions per second.
In accordance with the Joint Electronics Type Designation System, the "AN/AYK-14" designation represents the 14th design of an Army-Navy airborne electronic device for armament fire control equipment. The JETDS system also now is used to name all Department of Defense electronic systems.

Applications

History

The AYK-14, designed in 1976, had an original unit price of $185,000. By 1986, it was designated as the US Navy's Standard Airborne Computer. In 1987, the computer was upgraded delivering twice the performance and eight times the memory. Upgraded again in 1991, the operational speed was improved to 18 MIPS. Over 10,000 units have been delivered.

Technical description

The AN/AYK-14 series of systems are microprogrammed computers, intended for airborne vehicles and missions, but are also capable of shipboard and land use.

General characteristics

The AN/AYK-14 is a general-purpose 16-bit computer capable of 675 thousand operations per second. Its modular design provides for common firmware and support software.

System specifications and features

General Features
The AN/AYK-14 is designed to be physically and functionally modular. It can be expanded with plug-ins and additional enclosures. It's microprogrammed to emulate an extended AN/UYK-20. LSI components are used, and the system is packaged in ARINC Air Transport Rack enclosures.
Central Processor
  • Microprogrammed
  • 2's complement arithmetic
  • Executive and user states
  • Two sets of 16-word by 16-bit general registers
  • Two status registers
  • Three-level interrupt system
  • Addressing to 524,288 words
  • Fixed and floating-point arithmetic
  • 4-, 8-, 16-, and 32-bit operands
  • 16-, and 32-bit instructions
  • Direct, indirect, and indexed addressing
  • Optional hardware floating-point module
  • Loadable/readable 32-bit RTC clock, 1-MHz rate; 16-bit monitor clock, 10-KHz rate
  • Built-in-test functions
  • Bootstrap PROM memory
  • Power failure shutdown/recovery
  • I/O controller capability
  • * Chaining capability
  • * Control memory for each channel
  • * Up to 16 channels in various combinations
  • Interface to support equipment
  • Sample instruction times
  • * Shift 1.5 μsec
  • * Add, subtract 0.8
  • * Multiply 4.2
  • * Divide 8.4
  • * Basis: single GPM, core memory, overlapped access, interleaved addresses
    Memory control and memory
  • Core memory module, 32K words of 18 bits
  • Semiconductor memory module, 32K words of 18 bits
  • Interchangeable core and semiconductor memory modules
  • CMM has 900-nanosecond cycle time and 350-nanosecond access time
  • SMM has 400-nanosecond cycle time and 200-nanosecond access time
  • Interleaved or non-interleaved addressing
  • Read/write expandable memory, 4K x 18-bit RAM with optional 4K PROM
  • Parity bit per byte
  • Protect features
  • * Write protect
  • * Read protect
  • * Execute protect
  • * Block protect in paging system
  • Memory controller with paging to 524,288 words
    I/O Processor (optional)
  • I/O controller capability
  • Instruction subset compatible with central processor
  • Microprogrammed
  • Usable in conjunction with a central processor or as a stand-alone processor
  • Real-time and system clocks
  • 16-word by 16-bit general register set
  • Addressing to 65,536-words
  • Fixed point 16-bit arithmetic
  • Interface to support equipment

Subsystems

Processor

The general processing control module and the processor support module make up a 16-bit central processor. for a general purpose computer. The extended arithmetic unit is 32-bit floating-point hardware, controlled by the GPM. An input/output processor can be added to increase processing throughput. It can function as an input/output controller or as a single-module, 16-bit general purpose CPU.

Memory

The memory subsystem includes two 32K-word with an 18-bit word length. The memory control module provides the interface between the GPM and the memory modules. The read/write expandable memory module is a 4K word module with an 18-bit word that serves as memory for the IOP.

Input / Output

The AN/AYK-14 can support up to 16 I/O channels. A single chassis provides four to six I/O channels. XN-3 type enclosures can be added to expand the number of I/O channels. I/O module types include:

Environmental requirements

The AN/AYK-14 family of systems is designed to meet MIL-E-5400 requirements.