Hack computer


The Hack computer is a theoretical computer design created by Noam Nisan and Shimon Schocken and described in their book, The Elements of Computing Systems: Building a Modern Computer from First Principles. In using the term “modern”, the authors refer to a digital, binary machine that is patterned according to the von Neumann architecture model.
The Hack computer is intended for hands-on virtual construction in a hardware simulator application as a part of a basic, but comprehensive, course in computer organization and architecture. One such course, created by the authors and delivered in two parts, is freely available as a massive open online course called Build a Modern Computer From First Principles: From Nand to Tetris. In the twelve projects included in the course, learners start with a two input NAND gate and end up with a fully operational virtual computer, including both hardware and software. In addition to the hardware simulator used for initial implementation of the computer hardware, a complete Hack computer emulator program and assembler that supports the projects described in the book and the on-line course is also available at the author's web site.

Hardware architecture

The Hack computer hardware consists of three basic elements as shown in the block diagram. There are two separate 16-bit memory units and a central processing unit. Because data is moved and processed by the computer in 16-bit words, the Hack computer is classified as a 16-bit architecture.
The instruction memory, implemented as read-only memory from the viewpoint of the computer and designated ROM, holds assembled binary program code for execution. The random-access memory, called RAM, provides storage for an executing program’s data and provides services and storage areas for the computer’s memory-mapped I/O mechanism. Data processing and program control management are provided by the CPU.
The three units are connected by parallel buses. The address buses, as well as the data and instruction busses for the ROM and RAM units are completely independent. Therefore, the Hack design follows the Harvard architecture model with respect to bus communication between the memory units and the CPU. All memory is word addressable only.

Read-only memory (ROM)

The Hack computer’s ROM module is presented as a linear array of individually addressable, sequential, 16-bit memory registers. Addresses start at 0. Since the memory elements are sequential devices, a system clock signal is supplied by the simulation application and the computer emulator application. The ROM address bus is 15 bits wide, so a total of 32,768 individual words are available for program instructions. The address of the currently active word is supplied by a program counter register within the CPU. The value in the ROM memory register identified by the address placed on the instruction address bus in a particular clock cycle is available as the "current" instruction at the beginning of the next cycle. There is no instruction register; instructions are decoded in each cycle from the currently active ROM register.

Random-access memory (RAM)

Although the RAM module is also viewed as a continuous linear array of individually addressable sequential, read-write, 16-bit memory registers, it is functionally organized by address range into three segments. Addresses 0 through 16383 contain conventional 16-bit, read-write registers and are meant for use as general-purpose program data storage.
The registers at addresses 16384 through 24575 are essentially like data RAM, but they are also designated for use by a built-in screen I/O subsystem. Data written to addresses in this range have the side effect of producing output on the computer’s virtual 256 x 512 screen. If a program does not require screen output, registers in this range may be used for general program data.
The final address in the RAM address space, at 24576, contains a single one word register whose current value is controlled by the output of a keyboard attached to the computer hosting the Hack emulator program. This keyboard memory map register is read-only.
Data memory addresses in the range 24577 through 32767 are invalid. State transitions of the selected RAM memory register is also coordinated by the system clock signal.

Central processing unit (CPU)

As illustrated in the accompanying diagram, the Hack computer central processing unit is an integrated logic unit with internal structure. It provides many of the functions found in simple, commercially available CPUs. The most complex element of the CPU is the arithmetic logic unit which provides the computational functionality of the computer. The ALU is a combinational logic device having two 16-bit input operands and a single 16-bit output. The computation produced as output from the operands is specified by a set of six ordered, single-bit inputs to the ALU. The ALU also emits two single-bit status flags which indicate whether a computation result is zero or negative.
The CPU also contains two 16-bit registers, labeled D and A. The D register is a general-purpose register whose current value always supplies the ALU x operand, although for some instructions its value is ignored. While the A register may also provide its current value as the y operand to the ALU when so directed by an instruction, its value may also be used for data memory addressing and as a target address in instruction memory for branching instructions. To facilitate this function, the A register is directly associated with a "pseudo-register" designated as M which is not explicitly implemented in hardware. This M register therefore represents the value contained in RAM having the address of the current value contained in the A register.
The final important element in the CPU is the program counter register. The PC is a 16-bit binary counter whose low 15 bits specify the address in instruction memory of the next instruction for execution. Unless directed otherwise by a branching instruction, the PC increments its value at the end of each clock cycle. The CPU also includes logic to change, under program control, the order of the computer's instruction execution, by setting the PC to a non-sequential value. The PC also implements a single-bit reset input that initializes the PC value to 0 when it is cycled from logic 0 to logic 1 and back. Unlike many actual CPU designs, there is no program accessible hardware mechanism provided to implement CPU external or internal interrupts or support for function calls.

External input and output (I/O)

The Hack computer employs a memory-mapped approach to I/O. Bitmapped, black and white output to a virtual 256 x 512 screen is effected by writing a bitmap of the desired output to data memory locations 16384 through 24575. The data words in this address range are viewed as a linear array of bits with each bit value representing the black/white state of a single pixel on the computer emulator's virtual screen. The least significant bit of the word in the first memory address of the screen RAM segment sets the pixel in the upper left corner of the screen to white if it is 0 and black if it is 1. The next-most significant bit in the first word controls the next pixel to the right, and so on. After the first 512-pixel row is described by the first 32 words of screen memory, the mapping is continued in the same fashion for the second row with the next 32 words. Logic external to the computer reads the screen RAM memory map segment and updates the virtual screen.
If a keyboard is attached to the computer hosting the CPU emulator program, the emulator puts a 16-bit bit scan code corresponding to a key depressed during program execution into the keyboard register at RAM address 24576. If no key is depressed, this register contains the value 0. The emulator provides a toggle button to enable/disable the keyboard. The encoding scheme closely follows ASCII encoding for printable characters. The effect of the Shift key is generally honored. Codes are also provided for other keys often present on a standard PC keyboard; for example, direction control keys and Fn keys.

Operating cycle

Step-wise operation of the CPU and memory units is controlled by a clock that is built-in to both the hardware simulator and the computer emulator programs. At the beginning of a clock cycle the instruction at the ROM address emitted by the current value of the program counter is decoded. The ALU operands specified in the instruction are marshalled where needed. The computation specified is performed by the ALU and the appropriate status flags are set. The computation result is saved as specified by the instruction. Finally, the program counter is updated to the value of the next required program instruction. If no branching was specified by the current instruction, the PC value is simply incremented. If branching was specified, the PC is loaded with the address of the next instruction to be executed. The cycle then repeats using the now current PC value.
Because of its Harvard memory architecture model, the Hack computer is designed to execute the current instruction and “fetch” the next instruction in a single, two-part clock cycle. The speed of the clock may be varied by a control element in both the hardware simulator and the CPU emulator. Independent of the selected speed however, each instruction is completely executed in one cycle. The user may also single-step through a program.
Execution of a program loaded in ROM is controlled by the CPU's reset bit. If the value of the reset bit is 0, execution proceeds according to the operating cycle described above. Setting the reset bit to 1 sets the PC to 0. Setting the reset bit value back to zero then begins execution of the current program at the first instruction; however, RAM contains the values from any previous activity on reset.
There is no hardware or machine language support for interrupts of any kind.