HRS-100
HRS-100, ХРС-100, GVS-100 or ГВС-100, was a third generation hybrid computer developed by Mihajlo Pupin Institute and engineers from USSR in the period from 1968 to 1971. Three systems HRS-100 were deployed in Academy of Sciences of USSR in Moscow and Novosibirsk in 1971 and 1978. More production was contemplated for use in Czechoslovakia and German Democratic Republic (DDR), but that was not realised.
HRS-100 was invented and developed to study the dynamical systems in real and accelerated scale time and for efficient solving of wide array of scientific tasks at the institutes of the A.S. of USSR.
Overview
HRS-100 was composed of:- Digital computer:
- * central processor
- * 16 kilowords of 0.9 μs 36-bit magnetic core primary memory, expandable to 64 kilowords.
- * secondary disk storage
- * peripheral devices.
- multiple Analog computer modules
- Interconnection devices
- multiple analog and digital Peripheral devices
Central processing unit
HRS-100 has a 32-bit TTL MSI processor with following capabilities:- four basic arithmetic operations are implemented in hardware for both fixed point and floating point operations
- Addressing modes: immediate/literal, absolute/direct, relative, unlimited-depth multi-level memory indirect and relative-indirect
- 7 index registers and dedicated "index arithmetic" hardware
- 32 interrupt "channels"
Primary memory
Primary memory was made up of 0.9 μs cycle time magnetic core modules. Each 36-bit word is organized as follows:- 32 data bits
- 1 parity bit
- 3 program protection bits specifying which program has access
Secondary storage
Secondary storage was composed of up to 8 of the CDC 9432D removable-media disk drive devices. Capacity of one set of disk platters was about 4 million 6-bit words or 768,000 words of HRS-100 computer. Total, combined, capacity of 8 drives is, therefore, 6,144,000 words. Each disk set comprised 6 platters out of which 10 surfaces are used. Data was organized into 100 cylinders and 16 1536-bit sectors.Average data access time was 100 ms. Maximum seek time was 25 ms. Raw transfer sector write speed was 208,333 characters/s.
Peripherals
Peripherals communicate with the computer using interrupts and full length of HRS-100 words. Each separate unit has its own controller. Following devices were produced or planned:- 5 to 8 channel Punched tape reader type PE 1001
- 5 to 8 channel Tape puncher type PE 4060 IBM 735 teleprinter
- Fast line printer DP 2440
- Standard 80-column punched card reader '''DP SR300'''
Interconnection hardware
Interconnection hardware connects digital and analog components of HRS-100 into a single unified computer. It comprised:- Control unit for exchange of logic signals
- Blocks of Aanalog-to-digital and digital-to-analog converters
- 16-bit 100 μs clock generator
- Conversion channel relay block
- Power supply
Analog-to-digital conversion is achieved by a single signed 14-bit 70,000 samples/s A/D converter and a 32-channel multiplexer. Digital-to-analog conversion is achieved by 16 independent signed 14-bit D/A converters with double registers. Typical D/A conversion took 2 μs.
Analog computer
Analog component of HRS-100 system is composed of up to seven analog machines all connected to the common-control panel. It contains all elements required to independently solve linear and non-linear differential equations, both directly and iteratively.Units of analog computer:
- linear analog calculation elements
- non-linear analog calculation elements
- parallel logic elements
- electronic potentiometer system
- calculation module and parallel logic control system
- periodic block
- control system
- address system
- measurement system
- exchangeable program board
- reference voltage supply
Analog component of HRS-100 has its own peripheral units:
- multi-channel ultraviolet writer
- three-colour oscilloscope
- X-Y writer
Development team
HRS-100 was designed and developed by the following team :Principal Science Researchers: Prof. Boris Yakovlevich Kogan, Petar Vrbavac and Georgi Konstantinov.Chief designers:- * Digital part: Svetomir Ojdanić, Dušan Hristović, A. Volkov, V. Lisikov
- * Analogue part: B.J.Kogan, N. N. Mihaylov, Slavoljub Marjanović, Pavle Pejović
- * Link: Milan Hruška, Čedomir Milenković, A. G. Spiro
- * Software: E. A. Trahtengerc, S.J.Vilenkin, V. L. Arlazarov, Nedeljko Parezanović.