Celeron

Celeron was a series of IA-32 and x86-64 computer microprocessors targeted at low-cost personal computers, manufactured by Intel from 1998 until 2023.
The first Celeron-branded CPU was introduced on April 15, 1998, and was based on the Pentium II. From 2009 onward, Celeron processors have supported both 32-bit and 64-bit x86 software. They typically include smaller CPU caches and fewer features, resulting in lower performance compared to Intel’s mainstream brands Pentium or Core. While some Celeron designs have achieved strong performance for their segment, the majority of the Celeron line has exhibited noticeably degraded performance. Intel’s higher-end brands command premium prices in part because they offer larger caches and advanced features that Celeron processors lack.
In September 2022, Intel announced that the Celeron brand, along with Pentium, were to be replaced with the new "Intel Processor" branding for low-end processors in laptops from 2023 onwards. The rebranding encompassed both desktop and mobile Celeron lines, which Intel phased out in 2023. Then, Intel released the N100 CPU, an evolution of the mobile Celeron, in 2023. The Celeron had two cores, but the N100 has four cores. The maximum operating clock is 3.40GHz, the TDP is 6W. The maximum RAM capacity is 16GB.

Background

As a product concept, the Celeron was introduced in response to Intel's loss of the low-end market, in particular to the Cyrix 6x86, the AMD K6, and the IDT Winchip. Intel's existing low-end product, the Pentium MMX, was no longer performance-competitive at 233 MHz. Although a faster Pentium MMX would have been a lower-risk strategy, the industry-standard Socket 7 platform hosted a market of competitor CPUs that could be drop-in replacements for the Pentium MMX. Instead, Intel pursued a budget part that was to be pin-compatible with their high-end Pentium II product, using the Pentium II's proprietary Slot 1 interface.
The Celeron also effectively killed off the nine-year-old i486 chip, which had been the low-end processor brand for entry-level desktops and laptops until 1998.
Intel hired marketing firm Lexicon Branding, which had originally come up with the name "Pentium", to devise a name for the new product as well. The San Jose Mercury News described Lexicon's reasoning behind the name they chose: "Celer is Latin for swift, as in the word 'accelerate', and 'on' as in 'turned on'. Celeron is seven letters and three syllables, like Pentium. The 'Cel' of Celeron rhymes with 'tel' of Intel."

Desktop Celerons

P6-based Celerons

Covington

Launched in April 1998, the first Covington Celeron was essentially a 266 MHz Pentium II manufactured without any secondary cache at all. Covington also shared the 80523 product code of Deschutes. Although clocked at 266 or 300 MHz, the cacheless Celerons had trouble outcompeting the parts they were designed to replace. Substantial numbers were sold on first release, largely on the strength of the Intel name, but the Celeron quickly achieved a poor reputation both in the trade press and among computer professionals. The initial market interest faded rapidly in the face of its poor performance, and with sales at a very low level, Intel felt obliged to develop a substantially faster replacement as soon as possible. Nevertheless, the first Celerons were quite popular among some overclockers, for their flexible overclockability and reasonable price. Covington was only manufactured in Slot 1 SEPP format.

Mendocino

The Mendocino Celeron, launched August 24, 1998, was the first retail CPU to use on-die L2 cache. Whereas Covington had no secondary cache at all, Mendocino included 128 KB of L2 cache running at full clock rate. The first Mendocino-core Celeron was clocked at a then-modest 300 MHz but offered almost twice the performance of the old cacheless Covington Celeron at the same clock rate. To distinguish it from the older Covington 300 MHz, Intel called the Mendocino core Celeron 300A. Although the other Mendocino Celerons did not have an A appended, some people call all Mendocino processors Celeron-A regardless of clock rate.
The new Mendocino-core Celeron was a good performer from the outset. Indeed, most industry analysts regarded the first Mendocino-based Celerons as too successful—performance was sufficiently high to not only compete strongly with rival parts, but also to attract buyers away from Intel's high-profit flagship, the Pentium II. Overclockers soon discovered that, given a high-end motherboard, many Celeron 300A CPUs could run reliably at 450 MHz. This was achieved by simply increasing the front-side bus clock rate from the stock 66 MHz to the 100 MHz clock of the Pentium II, helped by several facts: the 440BX chipset with nominal support for 100 MHz and correspondent memory had already been on the market, and the internal L2 cache was more tolerant to overclocking than external cache chips, which already had to run at half-CPU speed by design. At this frequency, the budget Mendocino Celeron rivaled the fastest x86 processors available. Some motherboards were designed to prevent this modification, by restricting the Celeron's front side bus to 66 MHz. However, overclockers soon found that putting tape over pin B21 of the Celeron's interface slot circumvented this, allowing a 100 MHz bus.
At the time on-die cache was difficult to manufacture; especially L2 as more of it is needed to attain an adequate level of performance. A benefit of on-die cache is that it operates at the same clock rate as the CPU. All other Intel CPUs at that time used motherboard mounted or slot mounted secondary L2 cache, which was very easy to manufacture, cheap, and simple to enlarge to any desired size, but they carried the performance penalty of slower cache performance, typically running at a FSB frequency of 60 to 100 MHz. The Pentium II's 512 KB of L2 cache was implemented with a pair of relatively high-performance L2 cache chips mounted on a special-purpose board alongside the processor itself, running at half the processor's clock rate and communicating with the CPU through a special back-side bus. This method of cache placement was expensive and imposed practical cache-size limits, but allowed the Pentium II to be clocked higher and avoided front side bus RAM/L2 cache contention typical with motherboard-placed L2 cache configurations.
Over time, newer Mendocino processors were released at 333, 366, 400, 433, 466, 500, and 533 MHz. The Mendocino Celeron CPU came only designed for a 66 MHz front-side bus, but this would not be a serious performance bottleneck until clock rates reached higher levels.
The Mendocino Celerons also introduced new packaging. When the Mendocinos debuted they came in both a Slot 1 SEPP and Socket 370 PPGA package. The Slot 1 form had been designed to accommodate the off-chip cache of the Pentium II and had mounting problems with motherboards. Because all Celerons are a single-chip design, however, there was no reason to retain the slot packaging for L2 cache storage, and Intel discontinued the Slot 1 variant; beginning with the 466 MHz part, only the PPGA Socket 370 form was offered. One interesting note about the PPGA Socket 370 Mendocinos is they supported symmetric multiprocessing, and there was at least one motherboard released which took advantage of this fact.
The Mendocino also came in a mobile variant, with clock rates of 266, 300, 333, 366, 400, 433 and 466 MHz.
In Intel's "Family/Model/Stepping" scheme, Mendocino CPUs are family 6, model 6 and their Intel product code is 80524. These identifiers are shared with the related Dixon Mobile Pentium II variant.

Coppermine-128

The next generation Celeron was the 'Coppermine-128' . These were a derivative of Intel's Coppermine Pentium III and were released on March 29, 2000. This Celeron used a Coppermine core with half of its L2 cache switched off, resulting in 128 KB of 4-way associative on-chip L2 cache as on the Mendocino, and was initially likewise restricted to a 66 MHz Front Side Bus speed. Despite the halved associativity on the L2 cache, which reduced hit rates compared to the full Coppermine design, it kept the 256-bit wide L2 cache bus, which meant an advantage compared to Mendocino and older Katmai/Pentium II designs, which all had a 64-bit datapath to their L2 caches. SSE instructions were also enabled.
All Coppermine-128s were produced in the same FCPGA Socket 370 format that most Coppermine Pentium III CPUs used. These Celeron processors began at 533 MHz and continued through 566, 600, 633, 667, 700, 733, and 766 MHz. Because of the limitations of the 66 MHz bus, there were diminishing returns on performance as clock rates increased. On January 3, 2001, Intel switched to a 100 MHz bus with the launch of the 800 MHz Celeron, resulting in a significant performance-per-clock improvement. All Coppermine-128 CPUs from 800 MHz and higher use the 100 MHz front side bus. Various models were made at 800, 850, 900, 950, 1000, and 1100 MHz.
In Intel's "Family/Model/Stepping" scheme, Coppermine Celerons and Pentium IIIs are family 6, model 8 and their Intel product code is 80526.

Tualatin-256

These Celeron processors, released initially at 1.2 GHz on October 2, 2001, were based on the Pentium III 'Tualatin' core and made with a 0.13 micrometer process for the FCPGA 2 Socket 370. They were nicknamed "Tualeron" by some enthusiasts — a portmanteau of the words Tualatin and Celeron. Some software and users refer to the chips as Celeron-S, referring to the chip's lineage with the Pentium III-S, but this is not an official designation. Intel later released 1 GHz and 1.1 GHz parts. A 1.3 GHz chip, launched January 4, 2002, and finally a 1.4 GHz chip, launched May 15, 2002, marked the end of the Tualatin-256 line.
The most significant differences compared to the Pentium III Tualatin are a lower 100 MHz bus and fixed 256 KB of L2 cache ; cache associativity stayed at 8-way, although the newly introduced data prefetching appears to have been disabled. Furthermore, the Tualatin-256's L2 cache has a higher latency which boosted manufacturing yields for this budget CPU. On the other hand, this improved stability when overclocking and most of them had no problem working at 133 MHz FSB for a substantial performance increase.
Despite offering much improved performance over the Coppermine Celeron it superseded, the Tualatin Celeron still suffered stiff competition from AMD's Duron budget processor. Intel later responded by releasing the NetBurst Willamette Celeron, and for some time Tualatin Celerons were manufactured and sold in parallel with the Pentium 4-based Celerons that replaced them.
In Intel's "Family/Model/Stepping" scheme, Tualatin Celerons and Pentium IIIs are family 6, model 11 and their Intel product code is 80530.