CDC Cyber
The CDC Cyber range of mainframe-class supercomputers were the primary products of Control Data Corporation during the 1970s and 1980s. In their day, they were the computer architecture of choice for scientific and mathematically intensive computing. They were used for modeling fluid flow, material science stress analysis, electrochemical machining analysis, probabilistic analysis, energy and academic computing, radiation shielding modeling, and other applications. The lineup also included the Cyber 18 and Cyber 1000 minicomputers. Like their predecessor, the CDC 6600, they were unusual in using the ones' complement binary representation.
Models
The Cyber line included five different series of computers:- The 70 and 170 series based on the architecture of the CDC 6600 and CDC 7600 supercomputers, respectively
- The 200 series based on the CDC STAR-100—released in the 1970s.
- The 180 series developed by a team in Canada—released in the 1980s
- The [|Cyberplus] or Advanced Flexible Processor
- The Cyber 18 minicomputer based on the CDC 1700
Cyber 70 and 170 series
The Cyber 70 and 170 architectures were successors to the earlier CDC 6600 and CDC 7600 series and therefore shared almost all of the earlier architecture's characteristics. The Cyber-70 series is a minor upgrade from the earlier systems. The Cyber-73 was largely the same hardware as the CDC 6400 - with the addition of a Compare and Move Unit. The CMU instructions speeded up comparison and moving of non-word aligned 6-bit character data. The Cyber-73 could be configured with either one or two CPUs. The dual-CPU version replaced the CDC 6500. As was the case with the CDC 6200, CDC also offered a Cyber-72. The Cyber-72 had identical hardware to a Cyber-73, but added additional clock cycles to each instruction to slow it down. This allowed CDC to offer a lower-performance version at a lower price point without the need to develop new hardware. It could also be delivered with dual CPUs. The Cyber 74 was an updated version of the CDC 6600. A dual-CPU version of the Cyber 74 contained one 6600-style CPU, and one Cyber-73 style CPU - similar to the earlier CDC 6700. The Cyber 76 was essentially a renamed CDC 7600. Neither the single-CPU Cyber-74 nor the Cyber-76 had CMU instructions. On a dual-CPU Cyber-74, the CMU instructions were only available on the second, Cyber-73 style CPU.The Cyber-170 series represented CDCs move from discrete electronic components and core memory to integrated circuits and semiconductor memory. The 172, 173, and 174 use integrated circuits and semiconductor memory whereas the 175 uses high-speed discrete transistors. The Cyber-170/700 series is a late-1970s refresh of the Cyber-170 line.
The central processor and central memory operated in units of 60-bit words. In CDC lingo, the term "byte" referred to 12-bit entities. Characters were six bits, operation codes were six bits, and central memory addresses were 18 bits. Central processor instructions were either 15 bits or 30 bits long.
The 18-bit addressing inherent to the Cyber 170 series imposed a limit of 262,144 words of main memory, which is semiconductor memory in this series. The central processor has no I/O instructions, relying upon the peripheral processor units to do I/O.
A Cyber 170-series system consists of one or two CPUs that run at either 25 or 40 MHz, and is equipped with 10, 14, 17, or 20 peripheral processors, and up to 24 high-performance channels for high-speed I/O. Due to the relatively slow memory reference times of the CPU, the higher-end CPUs are equipped with eight or twelve words of high-speed memory used as an instruction cache. Any loop that fit into the cache runs very fast, without referencing main memory for instruction fetch. The lower-end models do not contain an instruction stack. However, since up to four instructions are packed into each 60-bit word, some degree of prefetching is inherent in the design.
As with predecessor systems, the Cyber 170 series has eight 18-bit address registers, eight 18-bit index registers, and eight 60-bit operand registers. Seven of the A registers are tied to their corresponding X register. Setting A1 through A5 reads that address and fetches it into the corresponding X1 through X5 register. Likewise, setting register A6 or A7 writes the corresponding X6 or X7 register to central memory at the address written to the A register. A0 is effectively a scratch register.
The higher-end CPUs consisted of multiple functional units which allowed some degree of parallel execution of instructions. This parallelism allows assembly programmers to minimize the effects of the system's slow memory fetch time by pre-fetching data from central memory well before that data is needed. By interleaving independent instructions between the memory fetch instruction and the instructions manipulating the fetched operand, the time occupied by the memory fetch can be used for other computation. With this technique, coupled with the handcrafting of tight loops that fit within the instruction stack, a skilled Cyber assembly programmer can write extremely efficient code that makes the most of the power of the hardware.
The peripheral processor subsystem uses a technique known as barrel and slot to share the execution unit; each PP had its own memory and registers, but the processor itself executed one instruction from each PP in turn. This is a crude form of hardware multiprogramming. The peripheral processors have 4096 bytes of 12-bit memory words and an 18-bit accumulator register. Each PP has access to all I/O channels and all of the system's central memory in addition to the PP's own memory. The PP instruction set lacks, for example, extensive arithmetic capabilities and does not run user code; the peripheral processor subsystem's purpose is to process I/O and thereby free the more powerful central processor unit to running user computations.
A feature of the lower Cyber CPUs is the Compare Move Unit. It provides four additional instructions intended to aid text processing applications. In an unusual departure from the rest of the 15- and 30-bit instructions, these are 60-bit instructions. The instructions are: move a short string, move a long string, compare strings, and compare a collated string. They operate on six-bit fields in central memory. For example, a single instruction can specify "move the 72 character string starting at word 1000 character 3 to location 2000 character 9". The CMU hardware is not included in the higher-end Cyber CPUs, because hand coded loops could run as fast or faster than the CMU instructions.
Later systems typically run CDC's NOS. Version 1 of NOS continued to be updated until about 1981; NOS version 2 was released early 1982, with the final version of 2.8.7 PSR 871, delivered in December 1997, which continues to have minor unofficial bug fixes, Y2K mitigation, etc in support of DtCyber. Besides NOS, the only other operating systems commonly used on the 170 series was NOS/BE or its predecessor SCOPE, a product of CDC's Sunnyvale division. These operating systems provide time-sharing of batch and interactive applications. The predecessor to NOS was Kronos which was in common use up until 1975 or so. Due to the strong dependency of developed applications on the particular installation's character set, many installations chose to run the older operating systems rather than convert their applications. Other installations would patch newer versions of the operating system to use the older character set to maintain application compatibility.
Cyber 180 series
Cyber 180 development began in the Advanced Systems Laboratory, a joint CDC/NCR development venture started in 1973 and located in Escondido, California. The machine family was originally called Integrated Product Line and was intended to be a virtual memory replacement for the NCR 6150 and CDC Cyber 70 product lines. The IPL system was also called the Cyber 80 in development documents. The Software Writer's Language, a high-level Pascal-like language, was developed for the project with the intent that all languages and the operating system were going to be written in SWL. SWL was later renamed PASCAL-X and eventually became Cybil. The joint venture was abandoned in 1976, with CDC continuing system development and renaming the Cyber 80 as Cyber 180. The first machines of the series were announced in 1982 and the product announcement for the NOS/VE operating system occurred in 1983.As the computing world standardized to an eight-bit byte size, CDC customers started pushing for the Cyber machines to do the same. The result was a new series of systems that could operate in both 60- and 64-bit modes. The 64-bit operating system was called NOS/VE, and supported the virtual memory capabilities of the hardware. The older 60-bit operating systems, NOS and NOS/BE, could run in a special address space for compatibility with the older systems.
The true 180-mode machines are microcoded processors that can support both instruction sets simultaneously. Their hardware is completely different from the earlier 6000/70/170 machines. The small 170-mode exchange package was mapped into the much larger 180-mode exchange package; within the 180-mode exchange package, there is a virtual machine identifier that determines whether the 8/16/64-bit two's complement 180 instruction set or the 12/60-bit ones' complement 170 instruction set is executed.
There were three true 180s in the initial lineup, codenamed P1, P2, P3. P2 and P3 were larger water-cooled designs. The P2 was designed in Mississauga, Ontario, by the same team that later designed the smaller P1, and the P3 was designed in Arden Hills, Minnesota. The P1 was a novel air-cooled, 60-board cabinet designed by a group in Mississauga; the P1 ran on 60 Hz current. A fourth high-end 180 model 990 was also under development in Arden Hills.
The 180s were initially marketed as 170/8xx machines with no mention of the new 8/64-bit system inside. However, the primary control program is a 180-mode program known as Environmental Interface. The 170 operating system used a single, large, fixed page within the main memory. There were a few clues that an alert user could pick up on, such as the "building page tables" message that flashed on the operator's console at startup and deadstart panels with 16 toggle switches per PP word on the P2 and P3.
The peripheral processors in the true 180s are always 16-bit machines with the sign bit determining whether a 16/64 bit or 12/60 bit PP instruction is being executed. The single word I/O instructions in the PPs are always 16-bit instructions, so at deadstart the PPs can set up the proper environment to run both EI plus NOS and the customer's existing 170-mode software. To hide this process from the customer, earlier in the 1980s CDC had ceased distribution of the source code for its Deadstart Diagnostic Sequence package and turned it into the proprietary Common Tests & Initialization package.
The initial 170/800 lineup was: 170/825, 170/835, 170/855, 170/865 and 170/875. The 825 was released initially after some delay loops had been added to its microcode; it seemed the design folks in Toronto had done a little too well and it was too close to the P2 in performance. The 865 and 875 models were revamped 170/760 heads with larger memories. The 865 used normal 170 memory; the 875 took its faster main processor memory from the Cyber 205 line.
A year or two after the initial release, CDC announced the 800-series' true capabilities to its customers, and the true 180s were relabeled as the 180/825, 180/835, and 180/855. At some point, the model 815 was introduced with the delayed microcode and the faster microcode was restored to the model 825. Eventually the THETA was released as the Cyber 990.