ARM9


ARM9 is a group of 32-bit RISC ARM processor cores licensed by ARM Holdings for microcontroller use. The ARM9 core family consists of ARM9TDMI, ARM940T, ARM9E-S, ARM966E-S, ARM920T, ARM922T, ARM946E-S, ARM9EJ-S, ARM926EJ-S, ARM968E-S, ARM996HS. ARM9 cores were released from 1998 to 2006, and no longer recommended for new IC designs; newer alternatives are ARM Cortex-M cores.

Overview

With this design generation, ARM moved from a von Neumann architecture to a Harvard architecture with separate instruction and data buses, significantly increasing its potential speed. Most silicon chips integrating these cores will package them as modified Harvard architecture chips, combining the two address buses on the other side of separated CPU caches and tightly coupled memories.
There are two subfamilies, implementing different ARM architecture versions.

Differences from ARM7 cores

Key improvements over ARM7 cores, enabled by spending more transistors, include:
Additionally, some ARM9 cores incorporate "Enhanced DSP" instructions, such as a multiply-accumulate, to support more efficient implementations of digital signal processing algorithms.
Switching from a von Neumann architecture entailed using a non-unified cache, so that instruction fetches do not evict data. ARM9 cores have separate data and address bus signals, which chip designers use in various ways. In most cases they connect at least part of the address space in von Neumann style, used for both instructions and data, usually to an AHB interconnect connecting to a DRAM interface and an External Bus Interface usable with NOR flash memory. Such hybrids are no longer pure Harvard architecture processors.

ARM license

neither manufactures nor sells CPU devices based on its own designs, but rather licenses the processor architecture to interested parties. ARM offers a variety of licensing terms, varying in cost and deliverables. To all licensees, ARM provides an integratable hardware description of the ARM core, as well as complete software development toolset and the right to sell manufactured silicon containing the ARM CPU. This model of licensed CPU core design is called an intellectual property core.

Silicon customization

Integrated device manufacturers receive the ARM Processor IP as synthesizable RTL. In this form, they have the ability to perform architectural level optimizations and extensions. This allows the manufacturer to achieve custom design goals, such as higher clock speed, very low power consumption, instruction set extensions, optimizations for size, debug support, etc. To determine which components have been included in a particular ARM CPU chip, consult the manufacturer datasheet and related documentation.

Cores

The ARM MPCore family of multicore processors support software written using either the asymmetric or symmetric multiprocessor programming paradigms. For AMP development, each central processing unit within the MPCore may be viewed as an independent processor and as such can follow traditional single processor development strategies.

ARM9TDMI

ARM9TDMI is a successor to the popular ARM7TDMI core, and is also based on the ARMv4T architecture. Cores based on it have five-stage pipeline, support both 32-bit ARM and 16-bit Thumb instruction sets and include:
  • ARM920T with 16 KB each of I/D cache and an MMU
  • ARM922T with 8 KB each of I/D cache and an MMU
  • ARM940T with cache and a Memory Protection Unit

    ARM9E-S and ARM9EJ-S

ARM9E, and its ARM9EJ sibling, implement the basic ARM9TDMI pipeline, but add support for the ARMv5TE architecture, which includes some DSP-esque instruction set extensions. In addition, the multiplier unit width has been doubled, halving the time required for most multiplication operations. They support 32-bit, 16-bit, and sometimes 8-bit instruction sets.
  • ARM926EJ-S with ARM Jazelle technology, which enables the direct execution of 8-bit Java bytecode in hardware, and an MMU
  • ARM946
  • ARM966
  • ARM968
The TI-Nspire CX and CX II graphing calculators use an ARM926EJ-S processor, clocked at 132 and 396 MHz respectively.

Chips

;ARM920T
;ARM922T
  • Micrel/Kendin KS8695
  • NXP LH7A4xx
;ARM925T
;ARM926EJ-S
;ARM940T
;ARM946E-S
  • Nintendo NTR-CPU, TWL-CPU
  • NXP Nexperia PNX5230
;ARM966E-S
  • LSI Logic LSI53C1030
  • STMicroelectronics STR9
;ARM968E-S
;Unreferenced ARM9 core
The amount of documentation for all ARM chips is daunting, especially for newcomers. The documentation for microcontrollers from past decades would easily be inclusive in a single document, but as chips have evolved so has the documentation grown. The total documentation is especially hard to grasp for all ARM chips since it consists of documents from the IC manufacturer and documents from CPU core vendor.
A typical top-down documentation tree is: high-level marketing slides, datasheet for the exact physical chip, a detailed reference manual that describes common peripherals and other aspects of physical chips within the same series, reference manual for the exact ARM core processor within the chip, reference manual for the ARM architecture of the core which includes detailed description of all instruction sets.
;Documentation tree :
  1. IC manufacturer marketing slides.
  2. IC manufacturer datasheets.
  3. IC manufacturer reference manuals.
  4. ARM core reference manuals.
  5. ARM architecture reference manuals.
IC manufacturer has additional documents, including: evaluation board user manuals, application notes, getting started with development software, software library documents, errata, and more.