Counter (digital)
In digital electronics, a counter is a sequential logic circuit that counts and stores the number of positive or negative transitions of a clock signal. A counter typically consists of flip-flops, which store a value representing the current count, and in many cases, additional logic to effect particular counting sequences, qualify clocks and perform other functions. Each relevant clock transition causes the current count to increment or decrement.
A digital counter is a finite state machine, with a clock input signal and multiple output signals that collectively represent the state. The state indicates the current count, encoded directly as a binary or binary-coded decimal number or using encodings such as one-hot or Gray code. Most counters have a reset input which is used to initialize the count. Depending on the design, a counter may have additional inputs to control functions such as count enabling and parallel data loading.
Digital counters are categorized in various ways, including by attributes such as modulus and output encoding, and by supplemental capabilities such as data preloading and bidirectional counting. Every counter is classified as either synchronous or asynchronous. Some counters, specifically ring counters and Johnson counters, are categorized according to their unique architectures.
Counters are the most commonly used sequential circuits and are widely used in computers, measurement and control, device interfaces, and other applications. They are implemented as stand-alone integrated circuits and as components of larger integrated circuits such as microcontrollers and FPGAs.
Characteristics
An electronic counter is a sequential logic circuit that has a clock input signal and a group of output signals that represent an integer "count" value. Upon each qualified clock edge, the circuit will increment the stored count. When the count reaches the end of the counting sequence, the next clock will cause the count to overflow or underflow and the counting sequence will start over.Signals
Every counter has a fundamental group of signals common to state machines:- Clock - triggers state change upon rising or falling edge.
- Reset – sets count to zero. Some IC manufacturers name this signal "clear" or "master reset ". Depending on the counter design, this signal may be asynchronous or synchronous.
- Count - bit vector representing the accumulated count. Depending on the counter design, this may be the current state or an encoding of the current state.
- Enable – allows or inhibits counting. Sometimes this is labeled CE.
- Direction – determines whether count will increment or decrement.
- Data – parallel input data which represents a particular count value.
- Load – copies parallel input data to the counter. This typically takes precedence over Enable if both Load and Enable are asserted.
Some counters provide a Terminal Count output which indicates that the next clock will cause overflow or underflow. This is used in various ways, including:
- to implement counter cascading by connecting the Terminal Count output of one counter to the Enable input of the next counter.
- to change the counter modulus, by connecting Terminal Count to the counter’s Load input and applying an appropriate value to the Data inputs.
Output encoding
Modulus
The modulus of a counter is the number of states in its count sequence. A counter that has modulus value m is commonly referred to as a modulo-m or MOD-m counter. For example, a decade counter is a digital counter which has ten states, and therefore is a MOD-10 counter.The maximum possible modulus of a counter is determined by the number of flip-flops. More specifically, a counter with n flip-flops has a maximum possible modulus of. For example, a four-bit counter can have a modulus of up to 16.
Some counters include all possible states in their count sequences. Other counters omit one or more possible states from their counting sequences. For example, a MOD-10 counter with four flip-flops only uses ten of 16 possible states.
Clocking method
Counters are broadly categorized as either synchronous or asynchronous depending on whether their flip-flops are clocked simultaneously or at different times.Synchronous
A synchronous counter is a digital counter in which all flip-flops share a common clock and change states at the same time.Asynchronous (ripple)
In an asynchronous counter, also known as a ripple counter, each flip-flop has a unique clock. The flip-flops are arranged in a "chain", with the counter's input clock connected to the first flip-flop and the output of each flip-flop clocking the next flip-flop in the chain. The natural counting sequence of such circuits is binary, and consequently most asynchronous counters are binary, with each flip-flop storing one bit of the binary count value.Since every flip-flop introduces a delay from active clock edge to output toggle, the counter bits change state at different times, producing a ripple effect that causes the count to be unstable while the input clock propagates through the flip-flops. During this instablility, the count will briefly transition through one or more invalid values. The duration of this instability depends on several factors, including the clock-to-output delay for each flip-flop and, for any particular count transition, the number of bits that change state. The maximum settling time occurs when all the counter bits change state and thus is proportional to the number of flip-flops.
This makes ripple counters unsuitable for use in synchronous circuits that require the counter to have a fast output settling time. Also, it is often impractical to use ripple counter output bits as clocks for external circuits because the ripple effect causes timing skew between the bits. Ripple counters are commonly used as general-purpose counters and clock frequency dividers in applications where instantaneous count and timing skew are unimportant. Asynchronous counters are typically not used in VLSI ICs due to the difficulties of simulating and testing them and because they require much greater design effort to ensure reliable operation.
Count direction
Many counters are designed to count in only one direction, meaning that they will either count up or down, but not both. A counter that only counts up is typically referred to as an up-counter, and one that only counts down as a down-counter.A bidirectional counter or up/down counter is a digital counter which counts up or down as directed by a direction control input signal. In synchronous up/down counters, the control signal is a single digital input whose state indicates count direction. In asynchronous up/down counters the direction control may alternatively consist of separate "up" and "down" clock inputs.
Common types
Binary counter
A binary counter is a digital counter that directly represents the count as a binary number. A binary counter is a MOD- counter, where n is the number of flip-flops used to store the count. For example, the illustrations below show the behavior of a 5-bit binary counter, which has 32 states and is therefore a MOD-32 counter:Asynchronous binary counter
An asynchronous binary counter, or binary ripple counter, is a "chain" of toggle flip-flops in which the least-significant flip-flop is clocked by the counter input clock, and all other flip-flops are clocked by the output of the nearest, less significant flip-flop. When implemented with JK or D flip-flops, each flip-flop is configured to toggle when clocked.Each flip-flop is effectively a one-bit counter which increments its count once per clock cycle. It counts from zero to one and then, when the next clock arrives, it will overflow and start its count sequence over again at zero. Each output state persists for a full input clock cycle, and consequently the frequency of each flip-flop's output signal is exactly half that of its input clock. Additional flip-flops may be added to the chain to form a counter of any arbitrary word size, with the output frequency of each bit equal to exactly half the frequency of its nearest, less significant bit.
Synchronous binary counter
The circuit shown below is a synchronous, up-counting four-bit binary counter implemented with JK flip-flops. Upon clock rising edge, bit 0 will always toggle, whereas other bits will toggle only when all less-significant bits are at a logic high state.As in asynchronous counters, each flip-flop introduces a delay from input clock edge to output toggle, but in this case all flip-flops change state concurrently, and consequently the counter output will settle after only one flip-flop delay regardless of the number of bits.