Tick–tock model
Tick–tock was a production model adopted in 2007 by chip manufacturer Intel. Under this model, every new process technology was first used to manufacture a die shrink of a proven microarchitecture, followed by a new microarchitecture on the now-proven process. It was replaced by the process–architecture–optimization model, which was announced in 2016 and is like a tick–tock cycle followed by an optimization phase. More generally, tick–tock is an engineering model which refreshes one half of a binary system each release cycle.
History
Every "tick" represented a shrinking of the process technology of the previous microarchitecture and every "tock" designated a new microarchitecture. These occurred roughly every year to 18 months.Due to the slowing rate of process improvements, in 2014 Intel created a "tock refresh" of a tock in the form of a smaller update to the microarchitecture not considered a new generation in and of itself. In March 2016, Intel announced in a Form 10-K report that it would always do this in future, deprecating the tick–tock cycle in favor of a three-step process–architecture–optimization model, under which three generations of processors are produced under a single manufacturing process, with the third generation out of three focusing on optimization.
After introducing the Skylake architecture on a 14 nm process in 2015, its first optimization was Kaby Lake in 2016. Intel then announced a second optimization, Coffee Lake, in 2017 making a total of four generations at 14 nm before the Palm Cove die shrink to 10 nm in 2018.
Roadmap
Pentium 4 / Core / Xeon Roadmap
Atom roadmap
With Silvermont Intel tried to start tick-tock in Atom architecture but problems with the 10 nm process prevented it.In the table below instead of tick-tock steps Process-Architecture-Optimization are used. There is no official confirmation that Intel uses Process-Architecture-Optimization for Atom, but it enables us to understand what changes happened in each generation.
Note: There is further the Xeon Phi. It has up to now undergone four development steps with a current top model that got the code name Knights Landing that is derived from the Silvermont architecture as used for the Intel Atom series but realized in a shrunk 14 nm technology. In 2018, Intel announced that Knights Landing and all further Xeon Phi CPU models were discontinued. However, Intel's Sierra Forest and subsequent Atom-based Xeon CPUs are likely a spiritual successor to Xeon Phi.