FPGA Mezzanine Card


FPGA Mezzanine Card is an ANSI/VITA 57.1 standard that defines I/O mezzanine modules with connection to an FPGA or other device with re-configurable I/O capability. It specifies a low profile connector and compact board size for compatibility with several industry standard slot card, blade, low profile motherboard, and mezzanine form factors.

Specifications

The FMC specification defines:
  • I/O mezzanine modules, which connect to carrier cards
  • A high-speed connector family of connectors for I/O mezzanine modules
  • * Supporting up to 10 Gbit/s transmission with adaptively equalized I/O
  • * Supporting single ended and differential signaling up to 2 Gbit/s
  • * Numerous I/O available
  • The electrical connectivity of the I/O mezzanine module high-speed connector
  • * Supporting a wide range of signaling standards
  • * System configurable I/O functionality
  • * FPGA intimacy
  • The mechanical properties of the I/O mezzanine module
  • * Minimal size
  • * Scalable from low end to high performance applications
  • * Conduction and ruggedized support
The FMC specification has two defined sizes: single width and double width. The depth of both is about 76.5 mm. The FMC mezzanine module uses a high-pin count 400 pin high-speed array connector. A mechanically compatible low pin count connector with 160 pins can also be used with any of the form factors in the standard.

LPC vs. HPC

FMC allows for two sizes of connector, Low Pin Count and High Pin Count, each offering different levels of connectivity, analogous to how some PMC boards have a 32-bit interface while others have a 64-bit interface by using an additional connector. "The LPC connector provides 68 user-defined, single-ended signals or 34 user-defined, differential pairs. The HPC connector provides 160 user-defined, single-ended signals, 10 serial transceiver pairs, and additional clocks. The HPC and LPC connectors use the same mechanical connector. The only difference is which signals are actually populated. Thus, cards with LPC connectors can be plugged into HPC sites, and if properly designed, HPC cards can offer a subset of functionality when plugged into an LPC site."

FMC Geographical Address feature

FMC provides a Geographical Address using two pins
that are typically used by a mezzanine
device to determine which FMC connector on a carrier
it is attached to. For cards that have
only one FMC connector, the default
geographical address is 00.
Some FMC mezzanine cards may attach other devices
to the I2C bus and address them through a
system controller, using the geographical address
as a chip-select. This is not strictly in adherence
with the FMC specification.

FMC+

FMC+ is an enhancement to FMC. It increases multi-gigabit interfaces from 10 to 32 with data rates to 28 Gbps. It also provides a backward compatible path for FMC to reside on newer FMC+ carrier modules. FMC+ requirements are defined by the ANSI/VITA 57.4 standard.
Key features of the FMC+ Standard include:

  • Up to 20 high speed differential pairs supporting 10 Gbps signaling.
  • 4 differential clocks supporting 2 GHz signaling.
  • 80 differential I/O or 160 single ended general purpose I/O.
  • IPMI programming and card information access.
  • Support for user selectable I/O voltage standards.

The main differences between FMC and FMC+ are:

  • Increase in multi-gigabit interfaces from 10 to 32
  • Faster data rate at 28Gbps bi-directional.
  • FMC+ carriers allow for backwards compatibility with FMC mezzanines.
  • Additional I/O and user-defined DPs and SEs.