CMOS

Complementary metal–oxide–semiconductor is a type of metal–oxide–semiconductor field-effect transistor fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit chips, including microprocessors, microcontrollers, memory chips, and other digital logic circuits. CMOS overtook NMOS logic as the dominant MOSFET fabrication process for very large-scale integration chips in the 1980s, replacing earlier transistor–transistor logic technology at the same time. CMOS has since remained the standard fabrication process for MOSFET semiconductor devices., 99% of IC chips, including most digital, analog and mixed-signal ICs, were fabricated using CMOS technology.
In 1948, Bardeen and Brattain patented an insulated-gate transistor with an inversion layer. Bardeen's concept forms the basis of CMOS technology today. The CMOS process was presented by Fairchild Semiconductor's Frank Wanlass and Chih-Tang Sah at the International Solid-State Circuits Conference in 1963. Wanlass later filed US patent 3,356,858 for CMOS circuitry and it was granted in 1967. RCA Corporation| commercialized the technology with the trademark "COS-MOS" in the late 1960s, forcing other manufacturers to find another name, leading to "CMOS" becoming the standard name for the technology by the early 1970s.
Two important characteristics of CMOS devices are high noise immunity and low static power consumption. Since one transistor of the MOSFET pair is always off, the series combination draws significant power only momentarily during switching between on and off states. Consequently, CMOS devices do not produce as much waste heat as other forms of logic, like NMOS logic or transistor–transistor logic, which normally have some standing current even when not changing state. These characteristics allow CMOS to integrate a high density of logic functions on a chip. It was primarily for this reason that CMOS became the most widely used technology to be implemented in VLSI chips.
The phrase "metal–oxide–semiconductor" is a reference to the physical structure of MOS field-effect transistors, having a metal gate electrode placed on top of an oxide insulator, which in turn is on top of a semiconductor material. Aluminium was once used but now the material is polysilicon. Other metal gates have made a comeback with the advent of high-κ dielectric materials in the CMOS process, as announced by IBM and Intel for the 45 nanometer node and smaller sizes.
CMOS technology is also used for analog circuits such as image sensors, data converters, RF circuits, and highly integrated transceivers for many types of communication.

History

The principle of complementary symmetry was first introduced by George Sziklai in 1953 who then discussed several complementary bipolar circuits. Paul Weimer, also at RCA, invented in 1962 thin-film transistor complementary circuits, a close relative of CMOS. He invented complementary flip-flop and inverter circuits, but did no work in a more complex complementary logic. He was the first person able to put p-channel and n-channel TFTs in a circuit on the same substrate. Three years earlier, John T. Wallmark and Sanford M. Marcus published a variety of complex logic functions implemented as integrated circuits using JFETs, including complementary memory circuits. Frank Wanlass was familiar with work done by Weimer at RCA.
In 1955, Carl Frosch and Lincoln Derick accidentally grew a layer of silicon dioxide over the silicon wafer, for which they observed surface passivation effects. By 1957, Frosch and Derick, using masking and predeposition, were able to manufacture silicon transistors. They showed that silicon dioxide protected silicon wafers from dopants diffusing into the wafer, and insulated the wafer from damage due to heat during the process. J.R. Ligenza and W.G. Spitzer studied the mechanism of thermally grown oxides and fabricated a high quality Si/SiO₂ stack in 1960.
Following this research, Mohamed Atalla and Dawon Kahng proposed a silicon MOS transistor in 1959 and successfully demonstrated a working MOS device with their Bell Labs team in 1960. Their team included E. E. LaBate and E. I. Povilonis who fabricated the device; M. O. Thurston, L. A. D'Asaro, and J. R. Ligenza who developed the diffusion processes, and H. K. Gummel and R. Lindner who characterized the device. There were originally two types of MOSFET logic, PMOS and NMOS.
In 1948, Bardeen and Brattain patented the progenitor of MOSFET, an insulated-gate FET with an inversion layer. Bardeen's patent, and the concept of an inversion layer, forms the basis of CMOS technology today. A new type of MOSFET logic combining both the PMOS and NMOS processes was developed, called complementary MOS, by Chih-Tang Sah and Frank Wanlass at Fairchild. In February 1963, they published the invention in a research paper. In both the research paper and the patent filed by Wanlass, the fabrication of CMOS devices was outlined, on the basis of thermal oxidation of a silicon substrate to yield a layer of silicon dioxide located between the drain contact and the source contact.
CMOS was commercialised by RCA in the late 1960s. RCA adopted CMOS for the design of integrated circuits, developing CMOS circuits for an Air Force computer in 1965 and then a 288-bit CMOS SRAM memory chip in 1968. RCA also used CMOS for its 4000-series integrated circuits in 1968, starting with a 20μm semiconductor manufacturing process before gradually scaling to a 10 μm process over the next several years.
CMOS technology was initially overlooked by the American semiconductor industry in favour of NMOS, which was more powerful at the time. However, CMOS was quickly adopted and further advanced by Japanese semiconductor manufacturers due to its low power consumption, leading to the rise of the Japanese semiconductor industry. Toshiba developed C²MOS, a circuit technology with lower power consumption and faster operating speed than ordinary CMOS, in 1969. Toshiba used its C²MOS technology to develop a large-scale integration chip for Sharp's Elsi Mini LED pocket calculator, developed in 1971 and released in 1972. Suwa Seikosha began developing a CMOS IC chip for a Seiko quartz watch in 1969, and began mass-production with the launch of the Seiko Analog Quartz 38SQW watch in 1971. The first mass-produced CMOS consumer electronic product was the Hamilton Pulsar "Wrist Computer" digital watch, released in 1970. Due to low power consumption, CMOS logic has been widely used for calculators and watches since the 1970s.
The earliest microprocessors in the early 1970s were PMOS processors, which initially dominated the early microprocessor industry. By the late 1970s, NMOS microprocessors had overtaken PMOS processors. CMOS microprocessors were introduced in 1975, with the Intersil 6100, and RCA CDP 1801. However, CMOS processors did not become dominant until the 1980s.
CMOS was initially slower than NMOS logic, thus NMOS was more widely used for computers in the 1970s. The Intel 5101 CMOS memory chip had an access time of 800ns, whereas the fastest NMOS chip at the time, the Intel 2147 HMOS memory chip, had an access time of 55/70ns. In 1978, a Hitachi research team led by Toshiaki Masuhara introduced the twin-well Hi-CMOS process, with its HM6147 memory chip, manufactured with a 3 μm process. The Hitachi HM6147 chip was able to match the performance of the Intel 2147 HMOS chip, while the HM6147 also consumed significantly less power than the 2147. With comparable performance and much less power consumption, the twin-well CMOS process eventually overtook NMOS as the most common semiconductor manufacturing process for computers in the 1980s.
In the 1980s, CMOS microprocessors overtook NMOS microprocessors. NASA's Galileo spacecraft, sent to orbit Jupiter in 1989, used the RCA 1802 CMOS microprocessor due to low power consumption.
Intel introduced a 1.5 μm process for CMOS semiconductor device fabrication in 1983. In the mid-1980s, Bijan Davari of IBM developed high-performance, low-voltage, deep sub-micron CMOS technology, which enabled the development of faster computers as well as portable computers and battery-powered handheld electronics. In 1988, Davari led an IBM team that demonstrated a high-performance 250 nanometer CMOS process.
Fujitsu commercialized a 700nm CMOS process in 1987, and then Hitachi, Mitsubishi Electric, NEC and Toshiba commercialized 500nm CMOS in 1989. In 1993, Sony commercialized a 350nm CMOS process, while Hitachi and NEC commercialized 250nm CMOS. Hitachi introduced a 160nm CMOS process in 1995, then Mitsubishi introduced 150nm CMOS in 1996, and then Samsung Electronics introduced 140nm in 1999.
In 2000, Gurtej Singh Sandhu and Trung T. Doan at Micron Technology invented atomic layer deposition High-κ dielectric films, leading to the development of a cost-effective 90 nm CMOS process. Toshiba and Sony developed a 65 nm CMOS process in 2002, and then TSMC initiated the development of 45 nm CMOS logic in 2004. The development of pitch double patterning by Gurtej Singh Sandhu at Micron Technology led to the development of 30nm class CMOS in the 2000s.
CMOS is used in most modern LSI and VLSI devices. As of 2010, CPUs with the best performance per watt each year have been CMOS static logic since 1976. As of 2019, planar CMOS technology is still the most common form of semiconductor device fabrication, but is gradually being replaced by non-planar FinFET technology, which is capable of manufacturing semiconductor nodes smaller than 20nm.

Technical details

"CMOS" refers to both a particular style of digital circuitry design and the family of processes used to implement that circuitry on integrated circuits. CMOS circuitry dissipates less power than logic families with resistive loads. Since this advantage has increased and grown more important, CMOS processes and variants have come to dominate, thus the vast majority of modern integrated circuit manufacturing is on CMOS processes. CMOS logic consumes around one seventh the power of NMOS logic, and about 10 million times less power than bipolar transistor-transistor logic.
CMOS circuits use a combination of p-type and n-type metal–oxide–semiconductor field-effect transistor to implement logic gates and other digital circuits. Although CMOS logic can be implemented with discrete devices for demonstrations, commercial CMOS products are integrated circuits composed of up to billions of transistors of both types, on a rectangular piece of silicon of often between 10 and 400 mm².
CMOS always uses all enhancement-mode MOSFETs.