List of AMD FX processors

AMD FX is a discontinued series of AMD microprocessors for personal computers. The following is a list of AMD FX brand microprocessors. Some APUs also carry an FX model name, but the term "FX" normally only refers to CPUs which are not just APUs with the iGPU disabled.

Desktop CPUs

Athlon 64 Family (90–130 nm)

These processors were the first AMD CPUs to use the "FX" designation and identified the chip as being higher-performance. The frequency multiplier was unlocked in these chips.

SledgeHammer Core (130 nm)

Socket 940
L1 cache: 64 kb + 64 kb
L2 cache: 1024 kb
Instruction sets: MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64

FX-51 and FX-53

ClawHammer Core (130 nm)

Socket 939
L1 cache: 64 kb + 64 kb
L2 cache: 1024 kb
Instruction sets: MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64

FX-53 and FX-55

SanDiego Core (90 nm)

Socket 939
L1 cache: 64 kb + 64 kb
L2 cache: 1024 kb
Instruction sets: MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet

FX-55 and FX-57

Toledo Core (90 nm, dual-core)

Socket 939
L1 cache : 64 kb + 64 kb
L2 cache : 1024 kb
Instruction sets: MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet

FX-60

Windsor Core (90 nm, dual-core)

Socket AM2
L1 cache : 64 kb + 64 kb
L2 cache : 1024 kb
Instruction sets: MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet, AMD-V

FX-62

Windsor Core (90 nm, dual-core, dual-processor)

Socket F
L1 cache : 64 kb + 64 kb
L2 cache : 1024 kb
Instruction sets: MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, Cool'n'Quiet, AMD-V

FX-70, FX-72, FX-74

Bulldozer Family (32 nm)

All models binned from 8 logical cores with simple OROCHI die production, in 938 pins μPGA package AM3+ socket.
All AMD FX microprocessors are unlocked and overclockable.
Two Integers-Clusters in each Bulldozer Module.
4 Bulldozer modules within FX-8 series, 3 in FX-6 series, and 2 in FX-4 series.
All models support up to 4 DIMMs of DDR3-1866 memory.

Bulldozer Core (Zambezi, 32 nm)

Codenamed: Zambezi
Transistors: ~1.6 billion
Die size: 319 mm²
L1 data cache : 16 kb
L1 instruction cache : 64 kb
L2 cache : 2048 kb
All models support: MMX(+), SSE1 - 2 - 3 - 3s - 4.1 - 4.2 - 4a, NX bit, AMD64, AMD-V, Input–output [memory management unit|IOMMU], AES, CLMUL, AVX, XOP, FMA4, F16C, x86 [Bit manipulation instruction set#ABM (Advanced Bit Manipulation)|ABM], Turbo Core 2.0, PowerNow!, ECC

Piledriver Core (Vishera, 32 nm)

Codenamed: Vishera
L1 data cache : 16 kb
L1 instruction cache : 64 kb
L2 cache : 2048 kb
All models support: MMX(+), SSE1 - 2 - 3 - 3s - 4.1 - 4.2 - 4a, NX bit, AMD64, AMD-V, Input–output memory [management unit|IOMMU], AES, CLMUL, AVX, AVX 1.1, XOP, FMA3, FMA4, F16C, x86 Bit [manipulation instruction set#ABM (Advanced Bit Manipulation)|ABM], x86 Bit manipulation instruction set#BMI1 (Bit Manipulation [Instruction Set 1)|BMI1], TBM, Turbo Core 3.0, PowerNow!, EVP, ECC